On Thu, Nov 21, 2019 at 11:53:50AM +0200, Tali Perry wrote:
> Add Nuvoton NPCM BMC i2c controller driver.
>
> Signed-off-by: Tali Perry <tali.perry1@xxxxxxxxx>
Looking at all this SMB_* naming of the registers and also the quirks,
this looks more like an SMBUS controller to me?
> + // currently I2C slave IF only supports single byte operations.
> + // in order to utilyze the npcm HW FIFO, the driver will ask for 16bytes
> + // at a time, pack them in buffer, and then transmit them all together
> + // to the FIFO and onward to the bus .
> + // NACK on read will be once reached to bus->adap->quirks->max_read_len
> + // sending a NACK whever the backend requests for it is not supported.
This for example...
> +static const struct i2c_adapter_quirks npcm_i2c_quirks = {
> + .max_read_len = 32768,
> + .max_write_len = 32768,
> + .max_num_msgs = 2,
> + .flags = I2C_AQ_COMB_WRITE_THEN_READ
> +};
... and this. Like SMBus with the only exception of being able to send
32K in a row. Or?
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