Re: [PATCH v2 1/4] MIPS: Ingenic: initial X1000 support.

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Hi Zhou,


Le sam., nov. 23, 2019 at 10:32, Zhou Yanjie <zhouyanjie@xxxxxxxx> a écrit :
Support the Ingenic X1000 SoC using the code under arch/mips/jz4740.
This is left unselectable in Kconfig until a X1000 based board is
added in a later commit.

Signed-off-by: Zhou Yanjie <zhouyanjie@xxxxxxxx>
---

Notes:
    v1->v2:
    Rebase on top of mips-next, use ingenic-timer driver
    for system timer and clocksource.

arch/mips/boot/dts/ingenic/x1000.dtsi | 183 ++++++++++++++++++++++++++++++++++
 arch/mips/jz4740/Kconfig              |   6 ++
 2 files changed, 189 insertions(+)
 create mode 100644 arch/mips/boot/dts/ingenic/x1000.dtsi

diff --git a/arch/mips/boot/dts/ingenic/x1000.dtsi b/arch/mips/boot/dts/ingenic/x1000.dtsi
new file mode 100644
index 00000000..02a9b2a
--- /dev/null
+++ b/arch/mips/boot/dts/ingenic/x1000.dtsi
@@ -0,0 +1,183 @@
+// SPDX-License-Identifier: GPL-2.0
+#include <dt-bindings/clock/x1000-cgu.h>
+
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "ingenic,x1000", "ingenic,x1000e";
+
+	cpuintc: interrupt-controller {
+		#address-cells = <0>;
+		#interrupt-cells = <1>;
+		interrupt-controller;
+		compatible = "mti,cpu-interrupt-controller";
+	};
+
+	intc: interrupt-controller@10001000 {
+		compatible = "ingenic,x1000-intc", "ingenic,jz4780-intc";
+		reg = <0x10001000 0x50>;
+
+		interrupt-controller;
+		#interrupt-cells = <1>;
+
+		interrupt-parent = <&cpuintc>;
+		interrupts = <2>;
+	};
+
+	exclk: ext {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+	};
+
+	rtclk: rtc {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <32768>;
+	};
+
+	cgu: x1000-cgu@10000000 {
+		compatible = "ingenic,x1000-cgu";
+		reg = <0x10000000 0x100>;
+
+		#clock-cells = <1>;
+
+		clocks = <&exclk>, <&rtclk>;
+		clock-names = "ext", "rtc";
+	};
+
+	apb {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <>;

You can drop the 'apb' node and list the children in the top node directly. That's what we do in the devicetree for the other Ingenic SoCs.

Cheers,
-Paul


+
+		tcu: timer@10002000 {
+			compatible = "ingenic,x1000-tcu",
+					 "ingenic,jz4770-tcu",
+					 "simple-mfd";
+			reg = <0x10002000 0x1000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0x0 0x10002000 0x1000>;
+
+			#clock-cells = <1>;
+
+			clocks = <&cgu X1000_CLK_RTCLK
+				  &cgu X1000_CLK_EXCLK
+				  &cgu X1000_CLK_PCLK>;
+			clock-names = "rtc", "ext", "pclk";
+
+			interrupt-controller;
+			#interrupt-cells = <1>;
+
+			interrupt-parent = <&intc>;
+			interrupts = <27 26 25>;
+		};
+
+		uart0: serial@10030000 {
+			compatible = "ingenic,x1000-uart";
+			reg = <0x10030000 0x100>;
+
+			interrupt-parent = <&intc>;
+			interrupts = <51>;
+
+			clocks = <&exclk>, <&cgu X1000_CLK_UART0>;
+			clock-names = "baud", "module";
+
+			status = "disabled";
+		};
+
+		uart1: serial@10031000 {
+			compatible = "ingenic,x1000-uart";
+			reg = <0x10031000 0x100>;
+
+			interrupt-parent = <&intc>;
+			interrupts = <50>;
+
+			clocks = <&exclk>, <&cgu X1000_CLK_UART1>;
+			clock-names = "baud", "module";
+
+			status = "disabled";
+		};
+
+		uart2: serial@10032000 {
+			compatible = "ingenic,x1000-uart";
+			reg = <0x10032000 0x100>;
+
+			interrupt-parent = <&intc>;
+			interrupts = <49>;
+
+			clocks = <&exclk>, <&cgu X1000_CLK_UART2>;
+			clock-names = "baud", "module";
+
+			status = "disabled";
+		};
+
+		pinctrl: pin-controller@10010000 {
+			compatible = "ingenic,x1000-pinctrl";
+			reg = <0x10010000 0x800>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			gpa: gpio@0 {
+				compatible = "ingenic,x1000-gpio";
+				reg = <0>;
+
+				gpio-controller;
+				gpio-ranges = <&pinctrl 0 0 32>;
+				#gpio-cells = <2>;
+
+				interrupt-controller;
+				#interrupt-cells = <2>;
+
+				interrupt-parent = <&intc>;
+				interrupts = <17>;
+			};
+
+			gpb: gpio@1 {
+				compatible = "ingenic,x1000-gpio";
+				reg = <1>;
+
+				gpio-controller;
+				gpio-ranges = <&pinctrl 0 32 32>;
+				#gpio-cells = <2>;
+
+				interrupt-controller;
+				#interrupt-cells = <2>;
+
+				interrupt-parent = <&intc>;
+				interrupts = <16>;
+			};
+
+			gpc: gpio@2 {
+				compatible = "ingenic,x1000-gpio";
+				reg = <2>;
+
+				gpio-controller;
+				gpio-ranges = <&pinctrl 0 64 32>;
+				#gpio-cells = <2>;
+
+				interrupt-controller;
+				#interrupt-cells = <2>;
+
+				interrupt-parent = <&intc>;
+				interrupts = <15>;
+			};
+
+			gpd: gpio@3 {
+				compatible = "ingenic,x1000-gpio";
+				reg = <3>;
+
+				gpio-controller;
+				gpio-ranges = <&pinctrl 0 96 32>;
+				#gpio-cells = <2>;
+
+				interrupt-controller;
+				#interrupt-cells = <2>;
+
+				interrupt-parent = <&intc>;
+				interrupts = <14>;
+			};
+		};
+	};
+};
diff --git a/arch/mips/jz4740/Kconfig b/arch/mips/jz4740/Kconfig
index 4dd0c44..6b96844 100644
--- a/arch/mips/jz4740/Kconfig
+++ b/arch/mips/jz4740/Kconfig
@@ -33,3 +33,9 @@ config MACH_JZ4780
 	select MIPS_CPU_SCACHE
 	select SYS_HAS_CPU_MIPS32_R2
 	select SYS_SUPPORTS_HIGHMEM
+
+config MACH_X1000
+	bool
+	select MIPS_CPU_SCACHE
+	select SYS_HAS_CPU_MIPS32_R2
+	select SYS_SUPPORTS_HIGHMEM
--
2.7.4








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