Quoting Sandeep Maheswaram (2019-11-14 04:12:49)
> Add nodes for DWC3 USB controller, QMP and QUSB PHYs.
>
> Signed-off-by: Sandeep Maheswaram <sanm@xxxxxxxxxxxxxx>
Reviewed-by: Stephen Boyd <swboyd@xxxxxxxxxxxx>
One minor nit below.
> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> index 666e9b9..82f0b3a 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> @@ -911,6 +924,98 @@
> status = "disabled";
> };
>
> + usb_1_hsphy: phy@88e3000 {
> + compatible = "qcom,sc7180-qusb2-phy";
> + reg = <0 0x088e3000 0 0x400>;
> + status = "disabled";
> + #phy-cells = <0>;
> + clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
> + <&rpmhcc RPMH_CXO_CLK>;
> + clock-names = "cfg_ahb","ref";
Add a space after that comma please.
> + resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
> +
> + nvmem-cells = <&qusb2p_hstx_trim>;
> + };
> +
