This adds support for dynamic scaling of the DDR Controller (ddrc) present in imx8m series. Actual frequency switching is implemented inside TF-A, this driver wraps the SMC calls and synchronizes the clk tree. DRAM frequency switching requires clock manipulation but during this operation DRAM itself is briefly inaccessible so this operation is performed a SMC call to by TF-A which runs from a SRAM area. Upon returning to linux the clock tree is updated to correspond to hardware configuration. This is handled via CLK_GET_RATE_NO_CACHE for dividers but muxes are handled manually: the driver will prepare/enable the new parents ahead of switching (so that the expected roots are enabled) and afterwards it will call clk_set_parent to ensure the parents in clock framework are up-to-date. This series is atomically useful and roughly similar to devfreq drivers for tegra and rockchip. Running at lower dram rates saves power but can affect the functionality of other blocks in the chip (display, vpu etc). Support for in-kernel constraints will some separately. Angus/Martin: You previously attempted to test on purism boards, this updated version should work without hacks and has no dependencies. Changes since v3: * Rename to imx8m-ddrc. Similar blocks are present on imx7d and imx8qxp/imx8qm but soc integration is different. * Move dt bindings to /memory-controllers/fsl/ * Fix dt validation issues * Fix imx8mm.dtsi ddrc referencing ddrc_opp_table which is only defined in evk * Move opps to child of ddrc device node * Only add imx_ddrc_get_dev_status in perf patch. * Adjust print messages Link to v3: https://patchwork.kernel.org/cover/11221935/ Leonard Crestez (6): clk: imx8m: Set CLK_GET_RATE_NOCACHE on dram clocks clk: imx: Mark dram pll on 8mm and 8mn with CLK_GET_RATE_NOCACHE dt-bindings: memory: Add bindings for imx8m ddr controller PM / devfreq: Add dynamic scaling for imx8m ddr controller PM / devfreq: imx8m-ddrc: Measure bandwidth with perf arm64: dts: imx8m: Add ddr controller nodes .../memory-controllers/fsl/imx8m-ddrc.yaml | 61 ++ arch/arm64/boot/dts/freescale/imx8mm-evk.dts | 18 + arch/arm64/boot/dts/freescale/imx8mm.dtsi | 13 +- .../boot/dts/freescale/imx8mn-ddr4-evk.dts | 18 + arch/arm64/boot/dts/freescale/imx8mn.dtsi | 13 +- arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 24 + arch/arm64/boot/dts/freescale/imx8mq.dtsi | 13 +- drivers/clk/imx/clk-imx8mm.c | 13 +- drivers/clk/imx/clk-imx8mn.c | 14 +- drivers/clk/imx/clk-imx8mq.c | 15 +- drivers/clk/imx/clk-pll14xx.c | 7 + drivers/clk/imx/clk.h | 1 + drivers/devfreq/Kconfig | 10 + drivers/devfreq/Makefile | 1 + drivers/devfreq/imx8m-ddrc.c | 569 ++++++++++++++++++ 15 files changed, 777 insertions(+), 13 deletions(-) create mode 100644 Documentation/devicetree/bindings/memory-controllers/fsl/imx8m-ddrc.yaml create mode 100644 drivers/devfreq/imx8m-ddrc.c -- 2.17.1
