Hi Anson,
On Wed, Nov 6, 2019 at 11:08 PM Anson Huang <Anson.Huang@xxxxxxx> wrote:
>
> The latest i.MX6SLL EVK board supports HS400 mode, update usdhc's
Since this is a dtsi patch, it is better not to mention a specific
board here in the commit log.
It would be better to say that unlike i.MX6SL, the i.MX6SLL SoC can
support HS400 mode, hence fsl,imx7d-usdhc should be used as compatible
string.
Regards,
Fabio Estevam
> fallback compatible to support HS400 mode by default.
>
> Signed-off-by: Anson Huang <Anson.Huang@xxxxxxx>
> ---
> No changes.
> ---
> arch/arm/boot/dts/imx6sll.dtsi | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx6sll.dtsi b/arch/arm/boot/dts/imx6sll.dtsi
> index 85aa8bb..1c8101f 100644
> --- a/arch/arm/boot/dts/imx6sll.dtsi
> +++ b/arch/arm/boot/dts/imx6sll.dtsi
> @@ -698,7 +698,7 @@
> };
>
> usdhc1: mmc@2190000 {
> - compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-usdhc";
> + compatible = "fsl,imx6sll-usdhc", "fsl,imx7d-usdhc";
> reg = <0x02190000 0x4000>;
> interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&clks IMX6SLL_CLK_USDHC1>,
> @@ -712,7 +712,7 @@
> };
>
> usdhc2: mmc@2194000 {
> - compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-usdhc";
> + compatible = "fsl,imx6sll-usdhc", "fsl,imx7d-usdhc";
> reg = <0x02194000 0x4000>;
> interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&clks IMX6SLL_CLK_USDHC2>,
> @@ -726,7 +726,7 @@
> };
>
> usdhc3: mmc@2198000 {
> - compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-usdhc";
> + compatible = "fsl,imx6sll-usdhc", "fsl,imx7d-usdhc";
> reg = <0x02198000 0x4000>;
> interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&clks IMX6SLL_CLK_USDHC3>,
> --
> 2.7.4
>
