Hi Jerome,
On Mon, Nov 4, 2019 at 9:08 AM Jerome Brunet <jbrunet@xxxxxxxxxxxx> wrote:
>
>
> On Sun 27 Oct 2019 at 17:18, Martin Blumenstingl <martin.blumenstingl@xxxxxxxxxxxxxx> wrote:
>
> > The XTAL clock is an actual crystal which is mounted on the PCB. Thus
> > the meson8b clock controller driver should not provide the XTAL clock.
> >
> > The meson8b clock controller driver must not use references to
> > the meson8b_xtal clock anymore before we can provide the XTAL clock
> > via OF. Replace the references to the meson8b_xtal.hw by using
> > clk_parent_data.name = "xtal" (along with index = -1) because this works
> > regardless how the XTAL clock is registered (either as fixed-clock in
> > the .dtb or - if missing - when registered in the meson8b clock
> > controller driver).
> >
> > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@xxxxxxxxxxxxxx>
> > ---
> > drivers/clk/meson/meson8b.c | 73 ++++++++++++++++++++-----------------
> > 1 file changed, 39 insertions(+), 34 deletions(-)
> >
> > diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c
> > index d376f80e806d..b785b67baf2b 100644
> > --- a/drivers/clk/meson/meson8b.c
> > +++ b/drivers/clk/meson/meson8b.c
> > @@ -97,8 +97,9 @@ static struct clk_regmap meson8b_fixed_pll_dco = {
> > .hw.init = &(struct clk_init_data){
> > .name = "fixed_pll_dco",
> > .ops = &meson_clk_pll_ro_ops,
> > - .parent_hws = (const struct clk_hw *[]) {
> > - &meson8b_xtal.hw
> > + .parent_data = &(const struct clk_parent_data) {
> > + .name = "xtal",
> > + .index = -1,
>
> if I got correctly, when transitioning to DT, you can specify both
> "fw_name" and "name". CCF should try to get the clock through DT and
> fallback to global name matching if not available
thank you for the hint - I may even get away with just setting fw_name
if I understand clk_core_get() correctly.
I'll try that during the weekend and report back
Martin
