On Fri, Oct 25, 2019 at 07:13:36PM +0800, Chunyan Zhang wrote:
>
> add a new bindings to describe sc9863a clock compatible string.
>
> Signed-off-by: Chunyan Zhang <chunyan.zhang@xxxxxxxxxx>
> ---
> .../bindings/clock/sprd,sc9863a-clk.txt | 59 +++++++++++++++++++
> 1 file changed, 59 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.txt
Please make this a DT schema.
> diff --git a/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.txt b/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.txt
> new file mode 100644
> index 000000000000..a73ae5574c82
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.txt
> @@ -0,0 +1,59 @@
> +Unisoc SC9863A Clock Binding
> +------------------------
> +
> +Required properties:
> +- compatible: should contain the following compatible strings:
> + - "sprd,sc9863a-ap-clk"
> + - "sprd,sc9863a-pmu-gate"
> + - "sprd,sc9863a-pll"
> + - "sprd,sc9863a-mpll"
> + - "sprd,sc9863a-rpll"
> + - "sprd,sc9863a-dpll"
> + - "sprd,sc9863a-aon-clk"
> + - "sprd,sc9863a-apahb-gate"
> + - "sprd,sc9863a-aonapb-gate"
> + - "sprd,sc9863a-mm-gate"
> + - "sprd,sc9863a-mm-clk"
> + - "sprd,sc9863a-vspahb-gate"
> + - "sprd,sc9863a-apapb-gate"
> +
> +- #clock-cells: must be 1
> +
> +- clocks : Should be the input parent clock(s) phandle for the clock, this
> + property here just simply shows which clock group the clocks'
> + parents are in, since each clk node would represent many clocks
> + which are defined in the driver. The detailed dependency
> + relationship (i.e. how many parents and which are the parents)
> + are implemented in driver code.
You need to define how many clocks for each block.
> +
> +Optional properties:
> +
> +- reg: Contain the registers base address and length. It must be configured
> + only if no 'sprd,syscon' under the node.
> +
> +- sprd,syscon: phandle to the syscon which is in the same address area with
> + the clock, and so we can get regmap for the clocks from the
> + syscon device.
Can't these be child nodes of the syscon instead?
> +
> +Example:
> + ap_clk: clock-controller@21500000 {
> + compatible = "sprd,sc9863a-ap-clk";
> + reg = <0 0x21500000 0 0x1000>;
> + clocks = <&ext_32k>, <&ext_26m>,
> + <&pll 0>, <&rpll 0>;
> + #clock-cells = <1>;
> + };
> +
> + pmu_gate: pmu-gate {
> + compatible = "sprd,sc9863a-pmu-gate";
> + sprd,syscon = <&pmu_regs>; /* 0x402b0000 */
> + clocks = <&ext_26m>;
> + #clock-cells = <1>;
> + };
> +
> + pll: pll {
> + compatible = "sprd,sc9863a-pll";
> + sprd,syscon = <&anlg_phy_g2_regs>; /* 0x40353000 */
> + clocks = <&pmu_gate 0>;
> + #clock-cells = <1>;
> + };
> --
> 2.20.1
>
>
