On Thu, Oct 24, 2019 at 08:22:34PM +0300, Codrin Ciubotariu wrote:
> On SAM9X60, slewrate should be enabled on pins with a switching frequency
> below 50Mhz. Since most of our pins do not exceed this value, we enable
> slewrate by default. Pins with a switching value that exceeds 50Mhz will
> have to explicitly disable slewrate.
>
> Suggested-by: Ludovic Desroches <ludovic.desroches@xxxxxxxxxxxxx>
> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@xxxxxxxxxxxxx>
> ---
> drivers/pinctrl/pinctrl-at91.c | 4 ++--
> include/dt-bindings/pinctrl/at91.h | 4 ++--
> 2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
> index 117075b5798f..c135149e84e9 100644
> --- a/drivers/pinctrl/pinctrl-at91.c
> +++ b/drivers/pinctrl/pinctrl-at91.c
> @@ -85,8 +85,8 @@ enum drive_strength_bit {
> DRIVE_STRENGTH_SHIFT)
>
> enum slewrate_bit {
> - SLEWRATE_BIT_DIS,
> SLEWRATE_BIT_ENA,
> + SLEWRATE_BIT_DIS,
> };
>
> #define SLEWRATE_BIT_MSK(name) (SLEWRATE_BIT_##name << SLEWRATE_SHIFT)
> @@ -669,7 +669,7 @@ static void at91_mux_sam9x60_set_slewrate(void __iomem *pio, unsigned pin,
> {
> unsigned int tmp;
>
> - if (setting < SLEWRATE_BIT_DIS || setting > SLEWRATE_BIT_ENA)
> + if (setting < SLEWRATE_BIT_ENA || setting > SLEWRATE_BIT_DIS)
> return;
>
> tmp = readl_relaxed(pio + SAM9X60_PIO_SLEWR);
> diff --git a/include/dt-bindings/pinctrl/at91.h b/include/dt-bindings/pinctrl/at91.h
> index 3831f91fb3ba..e8e117306b1b 100644
> --- a/include/dt-bindings/pinctrl/at91.h
> +++ b/include/dt-bindings/pinctrl/at91.h
> @@ -27,8 +27,8 @@
> #define AT91_PINCTRL_DRIVE_STRENGTH_MED (0x2 << 5)
> #define AT91_PINCTRL_DRIVE_STRENGTH_HI (0x3 << 5)
>
> -#define AT91_PINCTRL_SLEWRATE_DIS (0x0 << 9)
> -#define AT91_PINCTRL_SLEWRATE_ENA (0x1 << 9)
> +#define AT91_PINCTRL_SLEWRATE_ENA (0x0 << 9)
> +#define AT91_PINCTRL_SLEWRATE_DIS (0x1 << 9)
This is an ABI. You can't just change the definition.
Rob
