This hardware needs to deassert resets of both host and peripheral.
So, this patch adds reset control.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx>
---
drivers/clk/renesas/rcar-usb2-clock-sel.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/drivers/clk/renesas/rcar-usb2-clock-sel.c b/drivers/clk/renesas/rcar-usb2-clock-sel.c
index 570fbd0..dfe5510 100644
--- a/drivers/clk/renesas/rcar-usb2-clock-sel.c
+++ b/drivers/clk/renesas/rcar-usb2-clock-sel.c
@@ -19,6 +19,7 @@
#include <linux/platform_device.h>
#include <linux/pm.h>
#include <linux/pm_runtime.h>
+#include <linux/reset.h>
#include <linux/slab.h>
#define USB20_CLKSET0 0x00
@@ -36,6 +37,7 @@ struct usb2_clock_sel_priv {
void __iomem *base;
struct clk_hw hw;
struct clk *clks[CLK_NUM];
+ struct reset_control *rsts;
bool extal;
bool xtal;
};
@@ -63,11 +65,16 @@ static int usb2_clock_sel_enable(struct clk_hw *hw)
struct usb2_clock_sel_priv *priv = to_priv(hw);
int i, ret;
+ ret = reset_control_deassert(priv->rsts);
+ if (ret)
+ return ret;
+
for (i = 0; i < CLK_NUM; i++) {
ret = clk_prepare_enable(priv->clks[i]);
if (ret) {
while (--i >= 0)
clk_disable_unprepare(priv->clks[i]);
+ reset_control_assert(priv->rsts);
return ret;
}
}
@@ -86,6 +93,7 @@ static void usb2_clock_sel_disable(struct clk_hw *hw)
for (i = 0; i < CLK_NUM; i++)
clk_disable_unprepare(priv->clks[i]);
+ reset_control_assert(priv->rsts);
}
/*
@@ -164,6 +172,10 @@ static int rcar_usb2_clock_sel_probe(struct platform_device *pdev)
if (IS_ERR(priv->clks[CLK_INDEX_HS_USB]))
return PTR_ERR(priv->clks[CLK_INDEX_HS_USB]);
+ priv->rsts = devm_reset_control_array_get_optional_shared(&pdev->dev);
+ if (IS_ERR(priv->rsts))
+ return PTR_ERR(priv->rsts);
+
clk = devm_clk_get(dev, "usb_extal");
if (!IS_ERR(clk) && !clk_prepare_enable(clk)) {
priv->extal = !!clk_get_rate(clk);
--
2.7.4
