Hi, On J721e platform, the 2 lanes of SERDES PHY are used to achieve USB Type-C plug flip support without any additional MUX component by using a lane swap feature. However, the driver needs to know the Type-C plug orientation before it can decide whether to swap the lanes or not. This is achieved via a GPIO named DIR. Another constraint is that the lane swap must happen only when the PHY is in inactive state. This is achieved by sampling the GPIO and programming the lane swap before bringing the PHY out of reset. This series adds support to read the GPIO and accordingly program the Lane swap for Type-C plug flip support. Series must be applied on top of https://lkml.org/lkml/2019/10/16/517 cheers, -roger Roger Quadros (3): phy: cadence: Sierra: add phy_reset hook dt-bindings: phy: ti,phy-j721e-wiz: Add Type-C dir GPIO phy: ti: j721e-wiz: Manage typec-gpio-dir .../bindings/phy/ti,phy-j721e-wiz.txt | 9 ++++ drivers/phy/cadence/phy-cadence-sierra.c | 10 +++++ drivers/phy/ti/phy-j721e-wiz.c | 41 +++++++++++++++++++ 3 files changed, 60 insertions(+) -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
