Re: [PATCH 04/13] iio: imu: st_lsm6dsx: do not access active-low/open-drain regs if not supported

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On Sun,  6 Oct 2019 15:21:58 +0200
Lorenzo Bianconi <lorenzo@xxxxxxxxxx> wrote:

> Move active low and open drain register definitions in hw_settings
> register map since not all supported sensors (e.g lsm9ds1) rely on the
> same definitions
> 
> Fixes: 52f4b1f19679 ("iio: imu: st_lsm6dsx: add support for accel/gyro unit of lsm9ds1")
> Signed-off-by: Lorenzo Bianconi <lorenzo@xxxxxxxxxx>
Applied on the togreg branch of iio.git and pushed out as testing for
the autobuilders to play with it.

Thanks,

Jonathan

> ---
>  drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h      |  2 +
>  drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c | 79 ++++++++++++++++----
>  2 files changed, 67 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h
> index 873ec3b8fd69..8e002a51595e 100644
> --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h
> +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h
> @@ -268,6 +268,8 @@ struct st_lsm6dsx_settings {
>  		struct st_lsm6dsx_reg irq2_func;
>  		struct st_lsm6dsx_reg lir;
>  		struct st_lsm6dsx_reg clear_on_read;
> +		struct st_lsm6dsx_reg hla;
> +		struct st_lsm6dsx_reg od;
>  	} irq_config;
>  	struct st_lsm6dsx_odr_table_entry odr_table[2];
>  	struct st_lsm6dsx_fs_table_entry fs_table[2];
> diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c
> index 23d67caa24ed..a598cc8e9343 100644
> --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c
> +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c
> @@ -67,11 +67,6 @@
>  #define ST_LSM6DSX_REG_BDU_ADDR			0x12
>  #define ST_LSM6DSX_REG_BDU_MASK			BIT(6)
>  
> -#define ST_LSM6DSX_REG_HLACTIVE_ADDR		0x12
> -#define ST_LSM6DSX_REG_HLACTIVE_MASK		BIT(5)
> -#define ST_LSM6DSX_REG_PP_OD_ADDR		0x12
> -#define ST_LSM6DSX_REG_PP_OD_MASK		BIT(4)
> -
>  static const struct iio_chan_spec st_lsm6dsx_acc_channels[] = {
>  	ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x28, IIO_MOD_X, 0),
>  	ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2a, IIO_MOD_Y, 1),
> @@ -170,6 +165,14 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
>  				.addr = 0x0d,
>  				.mask = BIT(3),
>  			},
> +			.hla = {
> +				.addr = 0x22,
> +				.mask = BIT(5),
> +			},
> +			.od = {
> +				.addr = 0x22,
> +				.mask = BIT(4),
> +			},
>  		},
>  	},
>  	{
> @@ -261,6 +264,14 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
>  				.addr = 0x5f,
>  				.mask = BIT(5),
>  			},
> +			.hla = {
> +				.addr = 0x12,
> +				.mask = BIT(5),
> +			},
> +			.od = {
> +				.addr = 0x12,
> +				.mask = BIT(4),
> +			},
>  		},
>  		.decimator = {
>  			[ST_LSM6DSX_ID_ACC] = {
> @@ -404,6 +415,14 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
>  				.addr = 0x5f,
>  				.mask = BIT(5),
>  			},
> +			.hla = {
> +				.addr = 0x12,
> +				.mask = BIT(5),
> +			},
> +			.od = {
> +				.addr = 0x12,
> +				.mask = BIT(4),
> +			},
>  		},
>  		.decimator = {
>  			[ST_LSM6DSX_ID_ACC] = {
> @@ -556,6 +575,14 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
>  				.addr = 0x5f,
>  				.mask = BIT(5),
>  			},
> +			.hla = {
> +				.addr = 0x12,
> +				.mask = BIT(5),
> +			},
> +			.od = {
> +				.addr = 0x12,
> +				.mask = BIT(4),
> +			},
>  		},
>  		.decimator = {
>  			[ST_LSM6DSX_ID_ACC] = {
> @@ -702,6 +729,14 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
>  				.addr = 0x56,
>  				.mask = BIT(6),
>  			},
> +			.hla = {
> +				.addr = 0x12,
> +				.mask = BIT(5),
> +			},
> +			.od = {
> +				.addr = 0x12,
> +				.mask = BIT(4),
> +			},
>  		},
>  		.batch = {
>  			[ST_LSM6DSX_ID_ACC] = {
> @@ -856,6 +891,14 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
>  				.addr = 0x5f,
>  				.mask = BIT(5),
>  			},
> +			.hla = {
> +				.addr = 0x12,
> +				.mask = BIT(5),
> +			},
> +			.od = {
> +				.addr = 0x12,
> +				.mask = BIT(4),
> +			},
>  		},
>  		.batch = {
>  			[ST_LSM6DSX_ID_ACC] = {
> @@ -1002,6 +1045,14 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
>  				.addr = 0x5f,
>  				.mask = BIT(5),
>  			},
> +			.hla = {
> +				.addr = 0x12,
> +				.mask = BIT(5),
> +			},
> +			.od = {
> +				.addr = 0x12,
> +				.mask = BIT(4),
> +			},
>  		},
>  		.batch = {
>  			[ST_LSM6DSX_ID_ACC] = {
> @@ -1900,8 +1951,9 @@ static irqreturn_t st_lsm6dsx_handler_thread(int irq, void *private)
>  
>  static int st_lsm6dsx_irq_setup(struct st_lsm6dsx_hw *hw)
>  {
> -	struct st_sensors_platform_data *pdata;
>  	struct device_node *np = hw->dev->of_node;
> +	struct st_sensors_platform_data *pdata;
> +	const struct st_lsm6dsx_reg *reg;
>  	unsigned long irq_type;
>  	bool irq_active_low;
>  	int err;
> @@ -1922,20 +1974,19 @@ static int st_lsm6dsx_irq_setup(struct st_lsm6dsx_hw *hw)
>  		return -EINVAL;
>  	}
>  
> -	err = regmap_update_bits(hw->regmap, ST_LSM6DSX_REG_HLACTIVE_ADDR,
> -				 ST_LSM6DSX_REG_HLACTIVE_MASK,
> -				 FIELD_PREP(ST_LSM6DSX_REG_HLACTIVE_MASK,
> -					    irq_active_low));
> +	reg = &hw->settings->irq_config.hla;
> +	err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
> +				 ST_LSM6DSX_SHIFT_VAL(irq_active_low,
> +						      reg->mask));
>  	if (err < 0)
>  		return err;
>  
>  	pdata = (struct st_sensors_platform_data *)hw->dev->platform_data;
>  	if ((np && of_property_read_bool(np, "drive-open-drain")) ||
>  	    (pdata && pdata->open_drain)) {
> -		err = regmap_update_bits(hw->regmap, ST_LSM6DSX_REG_PP_OD_ADDR,
> -					 ST_LSM6DSX_REG_PP_OD_MASK,
> -					 FIELD_PREP(ST_LSM6DSX_REG_PP_OD_MASK,
> -						    1));
> +		reg = &hw->settings->irq_config.od;
> +		err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
> +					 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
>  		if (err < 0)
>  			return err;
>  




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