Re: [PATCH v2] dt-bindings: irqchip: renesas: intc-irqpin: convert bindings to json-schema

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On Fri, Oct 11, 2019 at 1:57 AM Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote:
>
> Hi Rob, Kaneko-san,
>
> On Fri, Oct 11, 2019 at 12:07 AM Rob Herring <robh@xxxxxxxxxx> wrote:
> > On Fri, Sep 27, 2019 at 04:59:37AM +0900, Yoshihiro Kaneko wrote:
> > > Convert R-/SH-Mobile IRQPin Controller bindings documentation to json-schema.
> > >
> > > Signed-off-by: Yoshihiro Kaneko <ykaneko0929@xxxxxxxxx>
>
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.yaml
> > > @@ -0,0 +1,102 @@
> > > +# SPDX-License-Identifier: GPL-2.0
> > > +%YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/interrupt-controller/renesas,intc-irqpin.yaml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: DT bindings for the R-/SH-Mobile irqpin controller
> > > +
> > > +maintainers:
> > > +  - Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
>
> Looks like I received many maintainerships recently ;-)

Maybe I should have called it something else, but I view this as who's
the owner not who applies it. There are lots of binding files with no
maintainer, so it's me by default. I wanted to avoid that and not by
having 4K MAINTAINERS entries.

> > > +
> > > +properties:
> > > +  compatible:
> > > +    items:
> > > +      - enum:
> > > +          - renesas,intc-irqpin-r8a7740  # R-Mobile A1
> > > +          - renesas,intc-irqpin-r8a7778  # R-Car M1A
> > > +          - renesas,intc-irqpin-r8a7779  # R-Car H1
> > > +          - renesas,intc-irqpin-sh73a0   # SH-Mobile AG5
> > > +      - const: renesas,intc-irqpin
> > > +
> > > +  reg:
> > > +    # Base address and length of each register bank used by the external
> > > +    # IRQ pins driven by the interrupt controller hardware module. The base
> > > +    # addresses, length and number of required register banks varies with
> > > +    # soctype.
> > > +    minItems: 1
>
> minItems: 5
>
> > > +    maxItems: 6
> >
> > Every entry is the same thing?
>
> No they're not.
>
> First entry is the Interrupt control register.
> Second entry is the Interrupt priority register.
> Third entry is the Interrupt source register.
> Fourth entry is the Interrupt mask register.
> Fifth entry is the Interrupt mask clear register.
> Sixth entry is the optional Interrupt control register for ICR0 with IRLM bit.

So this should be an 'items' list with these descriptions.

Rob



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