On Tue, Sep 24, 2019 at 01:55:53PM +0200, Marek Szyprowski wrote:
> From: Maciej Falkowski <m.falkowski@xxxxxxxxxxx>
>
> Convert Samsung I2S controller to newer dt-schema format.
>
> Signed-off-by: Maciej Falkowski <m.falkowski@xxxxxxxxxxx>
> Signed-off-by: Marek Szyprowski <m.szyprowski@xxxxxxxxxxx>
> ---
> v4:
> - Removed description of i2s device nodes' clocks from
> 'clocks' property.
> - Added 'clock-output-names' property.
> - Added description of clock names.
> - Added '#clock-cells' property to required properties
> - Description of the provided clocks moved to samsung-i2s.h
> in separate patch
>
> Best regards,
> Maciej Falkowski
> ---
> .../devicetree/bindings/sound/samsung-i2s.txt | 84 -----------
> .../bindings/sound/samsung-i2s.yaml | 136 ++++++++++++++++++
> 2 files changed, 136 insertions(+), 84 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/sound/samsung-i2s.txt
> create mode 100644 Documentation/devicetree/bindings/sound/samsung-i2s.yaml
>
> diff --git a/Documentation/devicetree/bindings/sound/samsung-i2s.txt b/Documentation/devicetree/bindings/sound/samsung-i2s.txt
> deleted file mode 100644
> index a88cb00fa096..000000000000
> --- a/Documentation/devicetree/bindings/sound/samsung-i2s.txt
> +++ /dev/null
> @@ -1,84 +0,0 @@
> -* Samsung I2S controller
> -
> -Required SoC Specific Properties:
> -
> -- compatible : should be one of the following.
> - - samsung,s3c6410-i2s: for 8/16/24bit stereo I2S.
> - - samsung,s5pv210-i2s: for 8/16/24bit multichannel(5.1) I2S with
> - secondary fifo, s/w reset control and internal mux for root clk src.
> - - samsung,exynos5420-i2s: for 8/16/24bit multichannel(5.1) I2S for
> - playback, stereo channel capture, secondary fifo using internal
> - or external dma, s/w reset control, internal mux for root clk src
> - and 7.1 channel TDM support for playback. TDM (Time division multiplexing)
> - is to allow transfer of multiple channel audio data on single data line.
> - - samsung,exynos7-i2s: with all the available features of exynos5 i2s,
> - exynos7 I2S has 7.1 channel TDM support for capture, secondary fifo
> - with only external dma and more no.of root clk sampling frequencies.
> - - samsung,exynos7-i2s1: I2S1 on previous samsung platforms supports
> - stereo channels. exynos7 i2s1 upgraded to 5.1 multichannel with
> - slightly modified bit offsets.
> -
> -- reg: physical base address of the controller and length of memory mapped
> - region.
> -- dmas: list of DMA controller phandle and DMA request line ordered pairs.
> -- dma-names: identifier string for each DMA request line in the dmas property.
> - These strings correspond 1:1 with the ordered pairs in dmas.
> -- clocks: Handle to iis clock and RCLK source clk.
> -- clock-names:
> - i2s0 uses some base clocks from CMU and some are from audio subsystem internal
> - clock controller. The clock names for i2s0 should be "iis", "i2s_opclk0" and
> - "i2s_opclk1" as shown in the example below.
> - i2s1 and i2s2 uses clocks from CMU. The clock names for i2s1 and i2s2 should
> - be "iis" and "i2s_opclk0".
> - "iis" is the i2s bus clock and i2s_opclk0, i2s_opclk1 are sources of the root
> - clk. i2s0 has internal mux to select the source of root clk and i2s1 and i2s2
> - doesn't have any such mux.
> -- #clock-cells: should be 1, this property must be present if the I2S device
> - is a clock provider in terms of the common clock bindings, described in
> - ../clock/clock-bindings.txt.
> -- clock-output-names (deprecated): from the common clock bindings, names of
> - the CDCLK I2S output clocks, suggested values are "i2s_cdclk0", "i2s_cdclk1",
> - "i2s_cdclk3" for the I2S0, I2S1, I2S2 devices respectively.
> -
> -There are following clocks available at the I2S device nodes:
> - CLK_I2S_CDCLK - the CDCLK (CODECLKO) gate clock,
> - CLK_I2S_RCLK_PSR - the RCLK prescaler divider clock (corresponding to the
> - IISPSR register),
> - CLK_I2S_RCLK_SRC - the RCLKSRC mux clock (corresponding to RCLKSRC bit in
> - IISMOD register).
> -
> -Refer to the SoC datasheet for availability of the above clocks.
> -The CLK_I2S_RCLK_PSR and CLK_I2S_RCLK_SRC clocks are usually only available
> -in the IIS Multi Audio Interface.
> -
> -Note: Old DTs may not have the #clock-cells property and then not use the I2S
> -node as a clock supplier.
> -
> -Optional SoC Specific Properties:
> -
> -- samsung,idma-addr: Internal DMA register base address of the audio
> - sub system(used in secondary sound source).
> -- pinctrl-0: Should specify pin control groups used for this controller.
> -- pinctrl-names: Should contain only one value - "default".
> -- #sound-dai-cells: should be 1.
> -
> -
> -Example:
> -
> -i2s0: i2s@3830000 {
> - compatible = "samsung,s5pv210-i2s";
> - reg = <0x03830000 0x100>;
> - dmas = <&pdma0 10
> - &pdma0 9
> - &pdma0 8>;
> - dma-names = "tx", "rx", "tx-sec";
> - clocks = <&clock_audss EXYNOS_I2S_BUS>,
> - <&clock_audss EXYNOS_I2S_BUS>,
> - <&clock_audss EXYNOS_SCLK_I2S>;
> - clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
> - #clock-cells = <1>;
> - samsung,idma-addr = <0x03000000>;
> - pinctrl-names = "default";
> - pinctrl-0 = <&i2s0_bus>;
> - #sound-dai-cells = <1>;
> -};
> diff --git a/Documentation/devicetree/bindings/sound/samsung-i2s.yaml b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml
> new file mode 100644
> index 000000000000..7d2750c26f11
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml
> @@ -0,0 +1,136 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/sound/samsung-i2s.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Samsung SoC I2S controller
> +
> +maintainers:
> + - Krzysztof Kozlowski <krzk@xxxxxxxxxx>
> + - Sylwester Nawrocki <s.nawrocki@xxxxxxxxxxx>
> +
> +properties:
> + compatible:
> + description: |
> + samsung,s3c6410-i2s: for 8/16/24bit stereo I2S.
> +
> + samsung,s5pv210-i2s: for 8/16/24bit multichannel(5.1) I2S with
> + secondary fifo, s/w reset control and internal mux for root clk src.
> +
> + samsung,exynos5420-i2s: for 8/16/24bit multichannel(5.1) I2S for
> + playback, stereo channel capture, secondary fifo using internal
> + or external dma, s/w reset control, internal mux for root clk src
> + and 7.1 channel TDM support for playback. TDM (Time division multiplexing)
> + is to allow transfer of multiple channel audio data on single data line.
> +
> + samsung,exynos7-i2s: with all the available features of exynos5 i2s.
> + exynos7 I2S has 7.1 channel TDM support for capture, secondary fifo
> + with only external dma and more no.of root clk sampling frequencies.
> +
> + samsung,exynos7-i2s1: I2S1 on previous samsung platforms supports
> + stereo channels. exynos7 i2s1 upgraded to 5.1 multichannel with
> + slightly modified bit offsets.
> + enum:
> + - samsung,s3c6410-i2s
> + - samsung,s5pv210-i2s
> + - samsung,exynos5420-i2s
> + - samsung,exynos7-i2s
> + - samsung,exynos7-i2s1
> +
> + reg:
> + maxItems: 1
> +
> + dmas:
> + minItems: 2
> + maxItems: 3
> +
> + dma-names:
> + oneOf:
> + - items:
> + - const: tx
> + - const: rx
> + - items:
> + - const: tx
> + - const: rx
> + - const: tx-sec
> +
> + clocks:
> + minItems: 1
> + maxItems: 3
> +
> + clock-names:
> + oneOf:
> + - items:
> + - const: iis
> + - items: # for i2s0
> + - const: iis
> + - const: i2s_opclk0
> + - const: i2s_opclk1
> + - items: # for i2s1 and i2s2
> + - const: iis
> + - const: i2s_opclk0
> + description: |
> + "iis" is the i2s bus clock and i2s_opclk0, i2s_opclk1 are sources
> + of the root clk. i2s0 has internal mux to select the source
> + of root clk and i2s1 and i2s2 doesn't have any such mux.
> +
> + "#clock-cells":
> + const: 1
> +
> + clock-output-names: # deprecated
Instead:
deprecated: true
> + oneOf:
> + - items: # for i2s0
> + - const: i2s_cdclk0
> + - items: # for i2s1
> + - const: i2s_cdclk1
> + - items: # for i2s2
> + - const: i2s_cdclk2
> + description: Names of the CDCLK I2S output clocks.
> +
> + samsung,idma-addr:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: |
> + Internal DMA register base address of the audio
> + sub system(used in secondary sound source).
> +
> + pinctrl-0:
> + description: Should specify pin control groups used for this controller.
> +
> + pinctrl-names:
> + const: default
> +
> + "#sound-dai-cells":
> + const: 1
> +
> +required:
> + - compatible
> + - reg
> + - dmas
> + - dma-names
> + - clocks
> + - clock-names
> + - "#clock-cells"
Before, this was not a required property, except when registering a
clock provider. Are you 100% sure it we need to register clock provider
on every SoC?
For example, Exynos3250 does not do it... others also might.
Best regards,
Krzysztof
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/exynos-audss-clk.h>
> +
> + i2s0: i2s@3830000 {
> + compatible = "samsung,s5pv210-i2s";
> + reg = <0x03830000 0x100>;
> + dmas = <&pdma0 10>,
> + <&pdma0 9>,
> + <&pdma0 8>;
> + dma-names = "tx", "rx", "tx-sec";
> + clocks = <&clock_audss EXYNOS_I2S_BUS>,
> + <&clock_audss EXYNOS_I2S_BUS>,
> + <&clock_audss EXYNOS_SCLK_I2S>;
> + clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
> + #clock-cells = <1>;
> + samsung,idma-addr = <0x03000000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2s0_bus>;
> + #sound-dai-cells = <1>;
> + };
> +
> --
> 2.17.1
>
>
>
