The JZ4780 have 2 core, adding to DT. Signed-off-by: Alexandre GRIVEAUX <agriveaux@xxxxxxxxxxxx> --- arch/mips/boot/dts/ingenic/jz4780.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi index f928329b034b..9c7346724f1f 100644 --- a/arch/mips/boot/dts/ingenic/jz4780.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi @@ -7,6 +7,23 @@ #size-cells = <1>; compatible = "ingenic,jz4780"; + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + compatible = "ingenic,jz4780"; + device_type = "cpu"; + reg = <0>; + }; + + cpu@1 { + compatible = "ingenic,jz4780"; + device_type = "cpu"; + reg = <1>; + }; + }; + cpuintc: interrupt-controller { #address-cells = <0>; #interrupt-cells = <1>; -- 2.20.1