Hi Simon, On Thu, Sep 19, 2019 at 2:03 PM Simon Horman <horms@xxxxxxxxxxxx> wrote: > On Thu, Sep 19, 2019 at 12:05:21AM +0900, Yoshihiro Kaneko wrote: > > Convert Renesas Interrupt Controller bindings documentation to json-schema. > > > > Signed-off-by: Yoshihiro Kaneko <ykaneko0929@xxxxxxxxx> > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.yaml > > @@ -0,0 +1,84 @@ > > +# SPDX-License-Identifier: GPL-2.0 > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/interrupt-controller/renesas,irqc.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: DT bindings for the R-Mobile/R-Car/RZ/G interrupt controller > > + > > +maintainers: > > + - Geert Uytterhoeven <geert+renesas@xxxxxxxxx> > > + > > +properties: > > + compatible: > > + items: > > + - enum: > > + - renesas,irqc-r8a73a4 # R-Mobile APE6 > > + - renesas,irqc-r8a7743 # RZ/G1M > > + - renesas,irqc-r8a7744 # RZ/G1N > > + - renesas,irqc-r8a7745 # RZ/G1E > > + - renesas,irqc-r8a77470 # RZ/G1C > > + - renesas,irqc-r8a7790 # R-Car H2 > > + - renesas,irqc-r8a7791 # R-Car M2-W > > + - renesas,irqc-r8a7792 # R-Car V2H > > + - renesas,irqc-r8a7793 # R-Car M2-N > > + - renesas,irqc-r8a7794 # R-Car E2 > > + - renesas,intc-ex-r8a774a1 # RZ/G2M > > + - renesas,intc-ex-r8a774c0 # RZ/G2E > > + - renesas,intc-ex-r8a7795 # R-Car H3 > > + - renesas,intc-ex-r8a7796 # R-Car M3-W > > + - renesas,intc-ex-r8a77965 # R-Car M3-N > > + - renesas,intc-ex-r8a77970 # R-Car V3M > > + - renesas,intc-ex-r8a77980 # R-Car V3H > > + - renesas,intc-ex-r8a77990 # R-Car E3 > > + - renesas,intc-ex-r8a77995 # R-Car D3 > > + - const: renesas,irqc > > + > > + '#interrupt-cells': > > + # an interrupt index and flags, as defined in interrupts.txt in > > + # this directory > > + const: 2 > > + > > + interrupt-controller: true > > + > > + reg: > > + maxItems: 1 > > + > > + interrupts: > > + minItems: 1 > > + maxItems: 32 > > Is 'interrupts' required? Yes, there must be one upstream interrupt for each supported interrupt input. The number of inputs is SoC-specific. > > +examples: > > + - | > > + #include <dt-bindings/interrupt-controller/irq.h> > > + #include <dt-bindings/clock/r8a7790-clock.h> > > + > > + irqc0: interrupt-controller@e61c0000 { > > + compatible = "renesas,irqc-r8a7790", "renesas,irqc"; > > + #interrupt-cells = <2>; > > + interrupt-controller; > > + reg = <0 0xe61c0000 0 0x200>; > > + interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>, > > + <0 1 IRQ_TYPE_LEVEL_HIGH>, > > + <0 2 IRQ_TYPE_LEVEL_HIGH>, > > + <0 3 IRQ_TYPE_LEVEL_HIGH>; While at it, one may want to replace s/0/GIC_SPI/. > > + clocks = <&mstp4_clks R8A7790_CLK_IRQC>; and update clocks for the new CPG/MSTP bindings. > > + }; Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
