* H. Nikolaus Schaller <hns@xxxxxxxxxxxxx> [190911 17:48]: > See DM3730,DM275 data sheet (SPRS685B) footnote (6) in Table 4-19 > which says that ABB must be switched to FBB mode when using the > OPP1G. > > The LOD definition abb_mpu_iva already exists so that we need > to add plumbing for vbb-supply = <&abb_mpu_iva> > and define two voltage vectors for each OPP so that the abb LDO > is also updated by the ti-cpufreq driver. > > We also must switch the ti_cpufreq_soc_data to multi_regulator. > > Note: reading out the abb reglator voltage to verify that > it does do transitions can be done by > > cat /sys/devices/platform/68000000.ocp/483072f0.regulator-abb-mpu/regulator/regulator.*/microvolts > > Likewise, read the twl4030 provided VDD voltage by > > cat /sys/devices/platform/68000000.ocp/48070000.i2c/i2c-0/0-0048/48070000.i2c:twl@48:regulator-vdd1/regulator/regulator.*/microvolts > > Note: to check if the ABB FBB is enabled/disabled, check > registers > > PRM_LDO_ABB_CTRL 0x483072F4 bit 3:0 1=bypass 5=FBB > PRM_LDO_ABB_SETUP 0x483072F0 0x00=bypass 0x11=FBB > > e.g. > > /dev/mem opened. > Memory mapped at address 0xb6fe4000. > Value at address 0x483072F4 (0xb6fe42f4): 0x3205 > /dev/mem opened. > Memory mapped at address 0xb6f89000. > Value at address 0x483072F4 (0xb6f892f4): 0x3201 > > Note: omap34xx and am3517 have/need no comparable LDO > or mechanism. Acked-by: Tony Lindgren <tony@xxxxxxxxxxx>
