Intel PCIe is synopsys based controller utilizes the Designware
framework for host initialization and intel application
specific register configurations.
Changes on v3:
Compared to v2, map_irq() patch is removed as it is no longer
required for Intel PCIe driver. Intel PCIe driver does platform
specific interrupt configuration during core initialization. So
changed the subject line too.
Address v2 review comments for DT binding and PCIe driver
Dilip Kota (2):
dt-bindings: PCI: intel: Add YAML schemas for the PCIe RC controller
dwc: PCI: intel: Intel PCIe RC controller driver
.../devicetree/bindings/pci/intel,lgm-pcie.yaml | 137 ++++
drivers/pci/controller/dwc/Kconfig | 13 +
drivers/pci/controller/dwc/Makefile | 1 +
drivers/pci/controller/dwc/pcie-intel-axi.c | 840 +++++++++++++++++++++
4 files changed, 991 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/intel,lgm-pcie.yaml
create mode 100644 drivers/pci/controller/dwc/pcie-intel-axi.c
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2.11.0
