On Tue, Apr 22, 2014 at 01:01:30PM +0200, Hans de Goede wrote:
> Add clk-nodes for the mmc clocks.
>
> Signed-off-by: Hans de Goede <hdegoede@xxxxxxxxxx>
> ---
> arch/arm/boot/dts/sun6i-a31.dtsi | 32 ++++++++++++++++++++++++++++++++
> 1 file changed, 32 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
> index d45efa7..12bcc17 100644
> --- a/arch/arm/boot/dts/sun6i-a31.dtsi
> +++ b/arch/arm/boot/dts/sun6i-a31.dtsi
> @@ -198,6 +198,38 @@
> "apb2_uart4", "apb2_uart5";
> };
>
> + mmc0_clk: clk@01c20088 {
> + #clock-cells = <0>;
> + compatible = "allwinner,sun4i-a10-mod0-clk";
This is simply not true.
module0 clocks don't have any kind of phase control, while we do here.
You should introduce a new compatible.
(and change the clock-names content accordingly)
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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