Hi Xiaowei, > -----Original Message----- > From: Xiaowei Bao <xiaowei.bao@xxxxxxx> > Sent: 2019年8月23日 16:27 > To: robh+dt@xxxxxxxxxx; mark.rutland@xxxxxxx; shawnguo@xxxxxxxxxx; > Leo Li <leoyang.li@xxxxxxx>; M.h. Lian <minghuan.lian@xxxxxxx>; > Mingkai Hu <mingkai.hu@xxxxxxx>; Roy Zang <roy.zang@xxxxxxx>; > lorenzo.pieralisi@xxxxxxx; linux-pci@xxxxxxxxxxxxxxx; > devicetree@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; > linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; linuxppc-dev@xxxxxxxxxxxxxxxx; Z.q. > Hou <zhiqiang.hou@xxxxxxx> > Cc: bhelgaas@xxxxxxxxxx; Xiaowei Bao <xiaowei.bao@xxxxxxx>; Z.q. Hou > <zhiqiang.hou@xxxxxxx> > Subject: [PATCH v4 2/3] arm64: dts: ls1028a: Add PCIe controller DT nodes > > LS1028a implements 2 PCIe 3.0 controllers. > > Signed-off-by: Xiaowei Bao <xiaowei.bao@xxxxxxx> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@xxxxxxx> > --- > v2: > - Fix up the legacy INTx allocate failed issue. > v3: > - No change. > v4: > - Remove the num-lanes proparty. > depends on: > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatch > work.kernel.org%2Fproject%2Flinux-pci%2Flist%2F%3Fseries%3D162215&a > mp;data=02%7C01%7Czhiqiang.hou%40nxp.com%7C07a39c8a38114852ad8 > 808d727a50ea8%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C63 > 7021462174809487&sdata=MTVsUPPoy2NrMjpXG4BMocHIN0Gbkh3W > 8SN622QMLI8%3D&reserved=0 > > arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 50 > ++++++++++++++++++++++++++ > 1 file changed, 50 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi > b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi > index 72b9a75..a25f9d9 100644 > --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi > @@ -625,6 +625,56 @@ > }; > }; > > + pcie@3400000 { > + compatible = "fsl,ls1028a-pcie"; > + reg = <0x00 0x03400000 0x0 0x00100000 /* controller > registers */ > + 0x80 0x00000000 0x0 0x00002000>; /* configuration > space */ > + reg-names = "regs", "config"; > + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, /* PME > interrupt */ > + <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; /* aer > interrupt */ > + interrupt-names = "pme", "aer"; > + #address-cells = <3>; > + #size-cells = <2>; > + device_type = "pci"; > + dma-coherent; > + bus-range = <0x0 0xff>; > + ranges = <0x81000000 0x0 0x00000000 0x80 0x00010000 0x0 > 0x00010000 /* downstream I/O */ > + 0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 > 0x40000000>; /* non-prefetchable memory */ > + msi-parent = <&its>; > + #interrupt-cells = <1>; > + interrupt-map-mask = <0 0 0 7>; > + interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 > IRQ_TYPE_LEVEL_HIGH>, > + <0000 0 0 2 &gic 0 0 GIC_SPI 110 > IRQ_TYPE_LEVEL_HIGH>, > + <0000 0 0 3 &gic 0 0 GIC_SPI 111 > IRQ_TYPE_LEVEL_HIGH>, > + <0000 0 0 4 &gic 0 0 GIC_SPI 112 > IRQ_TYPE_LEVEL_HIGH>; > + status = "disabled"; > + }; lost the property num-viewport. > + > + pcie@3500000 { > + compatible = "fsl,ls1028a-pcie"; > + reg = <0x00 0x03500000 0x0 0x00100000 /* controller > registers */ > + 0x88 0x00000000 0x0 0x00002000>; /* configuration > space */ > + reg-names = "regs", "config"; > + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "pme", "aer"; > + #address-cells = <3>; > + #size-cells = <2>; > + device_type = "pci"; > + dma-coherent; > + bus-range = <0x0 0xff>; > + ranges = <0x81000000 0x0 0x00000000 0x88 0x00010000 0x0 > 0x00010000 /* downstream I/O */ > + 0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 > 0x40000000>; /* non-prefetchable memory */ > + msi-parent = <&its>; > + #interrupt-cells = <1>; > + interrupt-map-mask = <0 0 0 7>; > + interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 > IRQ_TYPE_LEVEL_HIGH>, > + <0000 0 0 2 &gic 0 0 GIC_SPI 115 > IRQ_TYPE_LEVEL_HIGH>, > + <0000 0 0 3 &gic 0 0 GIC_SPI 116 > IRQ_TYPE_LEVEL_HIGH>, > + <0000 0 0 4 &gic 0 0 GIC_SPI 117 > IRQ_TYPE_LEVEL_HIGH>; > + status = "disabled"; > + }; Ditto Thanks, Zhiqiang > + > pcie@1f0000000 { /* Integrated Endpoint Root Complex */ > compatible = "pci-host-ecam-generic"; > reg = <0x01 0xf0000000 0x0 0x100000>; > -- > 2.9.5
