Re: [PATCH 2/8] soc: ti: add initial PRM driver with reset control support

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On 23.8.2019 11.50, Philipp Zabel wrote:
On Wed, 2019-08-21 at 21:15 +0300, Tero Kristo wrote:
On 21.8.2019 18.45, Suman Anna wrote:
On 8/21/19 10:10 AM, Philipp Zabel wrote:
[...]
In general, assuming the device tree contains no errors, this should not
matter much, but I think it is nice if the reset driver, even with a
misconfigured device tree, can't write into arbitrary bit fields.

Tero,
Can you add a check for this if possible?

Well, I can enforce the usage of reset bit mapping, which I have already
implemented for some SoCs like am33xx. If the specific ID is not found,
I can bail out. So, basically in this example requesting reset at index
3 would succeed, but it would fail for any other ID; this would be
direct HW bit mapping.

That should be fine.

Ok, I am re-working it like this locally right now.

-Tero
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