On 20/8/2019 11:54 PM, Rob Herring wrote:
On Tue, Aug 20, 2019 at 5:31 AM Ramuthevar,Vadivel MuruganX
<vadivel.muruganx.ramuthevar@xxxxxxxxxxxxxxx> wrote:
From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@xxxxxxxxxxxxxxx>
Add a YAML schema to use the host controller driver with the
eMMC PHY on Intel's Lightning Mountain SoC.
Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@xxxxxxxxxxxxxxx>
---
changes in v2:
As per Rob Herring review comments, the following updates
- change GPL-2.0 -> (GPL-2.0-only OR BSD-2-Clause)
- filename is the compatible string plus .yaml
- LGM: Lightning Mountain
- update maintainer
- add intel,syscon under property list
- keep one example instead of two
---
.../bindings/phy/intel,lgm-emmc-phy.yaml | 72 ++++++++++++++++++++++
1 file changed, 72 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml
diff --git a/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml b/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml
new file mode 100644
index 000000000000..ec177573aca6
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml
@@ -0,0 +1,72 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/intel,lgm-emmc-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Intel Lightning Mountain(LGM) eMMC PHY Device Tree Bindings
+
+maintainers:
+ - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@xxxxxxxxxxxxxxx>
+
+
+description:
+ - Add a new compatible to use the host controller driver with the
+ eMMC PHY on Intel's Lightning Mountain SoC.
+
+$ref: /schemas/types.yaml#definitions/phandle
+ description:
+ - It also requires a "syscon" node with compatible = "intel,lgm-chiptop",
+ "syscon" to access the eMMC PHY register.
Not valid schema. Please build 'make dt_binding_check' and fix any warnings.
Hi Rob,
Thank you much for the review comments, will check and update .
With Best Regards
Vadivel
+
+properties:
+ "#phy-cells":
+ const: 0
+
+ compatible:
+ const: intel,lgm-emmc-phy
+
+ reg:
+ maxItems: 1
+
+ intel,syscon:
+ items:
+ - description:
+ - |
+ e-MMC phy module should include the following properties
+ * reg, Access the e-MMC, get the base address from syscon.
+ * reset, reset the e-MMC module.
+
+ clocks:
+ items:
+ - description: e-MMC phy module clock
+
+ clock-names:
+ items:
+ - const: emmcclk
+
+ resets:
+ maxItems: 1
+
+required:
+ - "#phy-cells"
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - resets
+
+additionalProperties: false
+
+examples:
+ - |
+ emmc_phy: emmc_phy {
+ compatible = "intel,lgm-emmc-phy";
+ reg = <0xe0020000 0x100>;
+ intel,syscon = <&sysconf>;
+ clocks = <&emmc>;
+ clock-names = "emmcclk";
+ #phy-cells = <0>;
+ };
+
+...
--
2.11.0
