The clock controller dedicated to audio clocks also provides reset lines on the g12 SoC family Signed-off-by: Jerome Brunet <jbrunet@xxxxxxxxxxxx> --- arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi index 809f741a82ec..8eb92edb7a66 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi @@ -1477,6 +1477,7 @@ compatible = "amlogic,g12a-audio-clkc"; reg = <0x0 0x0 0x0 0xb4>; #clock-cells = <1>; + #reset-cells = <1>; clocks = <&clkc CLKID_AUDIO>, <&clkc CLKID_MPLL0>, -- 2.21.0
