This mailbox hardware is present in Allwinner sun8i, sun9i, and sun50i SoCs. Add a device tree binding for it. Reviewed-by: Rob Herring <robh@xxxxxxxxxx> Signed-off-by: Samuel Holland <samuel@xxxxxxxxxxxx> --- .../mailbox/allwinner,sunxi-msgbox.yaml | 79 +++++++++++++++++++ 1 file changed, 79 insertions(+) create mode 100644 Documentation/devicetree/bindings/mailbox/allwinner,sunxi-msgbox.yaml diff --git a/Documentation/devicetree/bindings/mailbox/allwinner,sunxi-msgbox.yaml b/Documentation/devicetree/bindings/mailbox/allwinner,sunxi-msgbox.yaml new file mode 100644 index 000000000000..f34a1909ab2e --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/allwinner,sunxi-msgbox.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mailbox/allwinner,sunxi-msgbox.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner sunxi Message Box + +maintainers: + - Samuel Holland <samuel@xxxxxxxxxxxx> + +description: | + The hardware message box on sun6i and newer sunxi SoCs is a two-user mailbox + controller containing 8 unidirectional FIFOs. An interrupt is raised for + received messages, but software must poll to know when a transmitted message + has been acknowledged by the remote user. Each FIFO can hold four 32-bit + messages; when a FIFO is full, clients must wait before more transmissions. + + Refer to ./mailbox.txt for generic information about mailbox device-tree + bindings. + +properties: + compatible: + oneOf: + - items: + - enum: + - allwinner,sun8i-a83t-msgbox + - allwinner,sun8i-h3-msgbox + - allwinner,sun9i-a80-msgbox + - allwinner,sun50i-a64-msgbox + - allwinner,sun50i-h6-msgbox + - const: allwinner,sun6i-a31-msgbox + - items: + - const: allwinner,sun6i-a31-msgbox + + reg: + items: + - description: MMIO register range + + clocks: + maxItems: 1 + description: bus clock + + resets: + maxItems: 1 + description: bus reset + + interrupts: + maxItems: 1 + description: controller interrupt + + '#mbox-cells': + const: 1 + +required: + - compatible + - reg + - clocks + - resets + - interrupts + - '#mbox-cells' + +examples: + - | + #include <dt-bindings/clock/sun8i-h3-ccu.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/reset/sun8i-h3-ccu.h> + + msgbox: mailbox@1c17000 { + compatible = "allwinner,sun8i-h3-msgbox", + "allwinner,sun6i-a31-msgbox"; + reg = <0x01c17000 0x1000>; + clocks = <&ccu CLK_BUS_MSGBOX>; + resets = <&ccu RST_BUS_MSGBOX>; + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; + #mbox-cells = <1>; + }; + +... -- 2.21.0
