On 20/8/2019 3:27 AM, Rob Herring wrote:
On Sun, Aug 18, 2019 at 10:44 PM Ramuthevar,Vadivel MuruganX
<vadivel.muruganx.ramuthevar@xxxxxxxxxxxxxxx> wrote:
From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@xxxxxxxxxxxxxxx>
Add a new compatible to use the host controller driver with the
eMMC PHY on Intel's Lightning Mountain SoC.
Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@xxxxxxxxxxxxxxx>
---
.../bindings/phy/intel-lgm-emmc-phy.yaml | 70 ++++++++++++++++++++++
1 file changed, 70 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/intel-lgm-emmc-phy.yaml
diff --git a/Documentation/devicetree/bindings/phy/intel-lgm-emmc-phy.yaml b/Documentation/devicetree/bindings/phy/intel-lgm-emmc-phy.yaml
new file mode 100644
index 000000000000..52156ff091ad
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/intel-lgm-emmc-phy.yaml
@@ -0,0 +1,70 @@
+# SPDX-License-Identifier: GPL-2.0
Preference for new bindings is (GPL-2.0-only OR BSD-2-Clause)
Thanks a lot for the review comments, agreed, will update in the next
patch version.
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/intel-lgm-emmc-phy.yaml#
Preferred filename is the compatible string (plus .yaml).
Agreed!
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Intel LGM e-MMC PHY Device Tree Bindings
LGM is what?
Intel's Lightning Mountain(LGM) SoC.
+
+maintainers:
+ - Rob Herring <robh+dt@xxxxxxxxxx>
+ - Mark Rutland <mark.rutland@xxxxxxx>
I don't know anything about this h/w. Please put yourself here.
Agreed, will update.
+
+intel,syscon:
This will throw an error with 'make dt_binding_check'...
agreed, will remove
+ $ref: /schemas/types.yaml#definitions/phandle
+ description:
+ - |
+ e-MMC phy module connected through chiptop. Phandle to a node that can
+ contain the following properties
+ * reg, Access the e-MMC, get the base address from syscon.
+ * reset, reset the e-MMC module.
+
+properties:
+ "#phy-cells":
+ const: 0
+
+ compatible:
+ const: intel,lgm-emmc-phy
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: e-MMC phy module clock
+
+ clock-names:
+ items:
+ - const: emmcclk
+
+ resets:
+ maxItems: 1
+
+required:
+ - "#phy-cells"
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - resets
+
+additionalProperties: false
+
+examples:
+ - |
+ sysconf: chiptop@e0020000 {
+ compatible = "intel,chiptop-lgm", "syscon";
+ reg = <0xe0020000 0x100>;
+ #reset-cells = <1>;
+ };
+
+ - |
Looks like 1 example to me, not 2.
Agreed, I will keep the below one example.
Best Regards
Vadivel
+ emmc_phy: emmc_phy {
+ compatible = "intel,lgm-emmc-phy";
+ intel,syscon = <&sysconf>;
+ clocks = <&emmc>;
+ clock-names = "emmcclk";
+ #phy-cells = <0>;
+ };
+
+...
--
2.11.0
