On Wed, Aug 14, 2019 at 11:15 PM Tony Lindgren <tony@xxxxxxxxxxx> wrote:
>
> * Tony Lindgren <tony@xxxxxxxxxxx> [190815 04:03]:
> > * Adam Ford <aford173@xxxxxxxxx> [190814 19:14]:
> > > I do wonder if an omap34xx or omap36xx should use
> > > compatible = "ti,sysc-omap4", "ti,sysc";
> > >
> > > should it use an omap3 equivalent?
> >
> > We named the old hwmod type1 as ti,sysc-omap2, type2 as ti,sysc-omap4,
> > and type3 as ti,sysc-omap4-simple based on where we thought they
> > appeared. Based on the sysconfig register bit layout, sgx on omap36xx
> > seems to have a subset of ti,sysc-omap4 and we can recycle it. If we
> > used a wrong type, the module would not get enabled or disabled as
> > the register bits would not match.
> >
> > How about let's add a comment like:
> >
> > Yes sg has a subset of ti,sysc-omap4 type sysconfig register
>
> Well actually we already have some comments there, I clarified
> it a bit more and fixed the typos noted by Andrew. Updated patch
> below.
>
> Regards,
>
> Tony
>
> 8< ------------------
> From tony Mon Sep 17 00:00:00 2001
> From: Tony Lindgren <tony@xxxxxxxxxxx>
> Date: Wed, 14 Aug 2019 05:18:16 -0700
> Subject: [PATCH] ARM: dts: Configure interconnect target module for omap3
> sgx
> MIME-Version: 1.0
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> Content-Transfer-Encoding: 8bit
>
> Looks like omap34xx OCP registers are not readable unlike on omap36xx.
> We use SGX revision register instead of the OCP revision register for
> 34xx and do not configure any SYSCONFIG register unlike for 36xx.
Do you want/need me to test the OMAP3530? I can run the same tests I
did for the DM3730.
adam
>
> I've tested that the interconnect target module enables and idles
> just fine with PM runtime control via sys:
>
> # echo on > $(find /sys -name control | grep \/5000); rwmem 0x5000fe10
> # rwmem 0x50000014 # SGX revision register on 36xx
> 0x50000014 = 0x00010205
> # echo auto > $(find /sys -name control | grep \/5000)
> # rwmem 0x5000fe00
> And when idled, it will produce "Bus error" as expected.
>
> Cc: Adam Ford <aford173@xxxxxxxxx>
> Cc: Filip Matijević <filip.matijevic.pz@xxxxxxxxx>
> Cc: "H. Nikolaus Schaller" <hns@xxxxxxxxxxxxx>
> Cc: Ivaylo Dimitrov <ivo.g.dimitrov.75@xxxxxxxxx>
> Cc: moaz korena <moaz@xxxxxxxxxx>
> Cc: Merlijn Wajer <merlijn@xxxxxxxxxx>
> Cc: Paweł Chmiel <pawel.mikolaj.chmiel@xxxxxxxxx>
> Cc: Philipp Rossak <embed3d@xxxxxxxxx>
> Cc: Tomi Valkeinen <tomi.valkeinen@xxxxxx>
> Tested-by: Adam Ford <aford173@xxxxxxxxx> #logicpd-torpedo-37xx-devkit
> Signed-off-by: Tony Lindgren <tony@xxxxxxxxxxx>
> ---
> arch/arm/boot/dts/omap34xx.dtsi | 26 ++++++++++++++++++++++++++
> arch/arm/boot/dts/omap36xx.dtsi | 28 ++++++++++++++++++++++++++++
> 2 files changed, 54 insertions(+)
>
> diff --git a/arch/arm/boot/dts/omap34xx.dtsi b/arch/arm/boot/dts/omap34xx.dtsi
> --- a/arch/arm/boot/dts/omap34xx.dtsi
> +++ b/arch/arm/boot/dts/omap34xx.dtsi
> @@ -100,6 +100,32 @@
> interrupts = <18>;
> };
> };
> +
> + /*
> + * On omap34xx the OCP registers do not seem to be accessible
> + * at all unlike on 36xx. Maybe SGX is permanently set to
> + * "OCP bypass mode", or maybe there is OCP_SYSCONFIG that is
> + * write-only at 0x50000e10. We detect SGX based on the SGX
> + * revision register instead of the unreadable OCP revision
> + * register. Also note that on early 34xx es1 revision there
> + * are also different clocks, but we do not have any dts users
> + * for it.
> + */
> + sgx_module: target-module@50000000 {
> + compatible = "ti,sysc-omap2", "ti,sysc";
> + reg = <0x50000014 0x4>;
> + reg-names = "rev";
> + clocks = <&sgx_fck>, <&sgx_ick>;
> + clock-names = "fck", "ick";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0x50000000 0x4000>;
> +
> + /*
> + * Closed source PowerVR driver, no child device
> + * binding or driver in mainline
> + */
> + };
> };
>
> thermal_zones: thermal-zones {
> diff --git a/arch/arm/boot/dts/omap36xx.dtsi b/arch/arm/boot/dts/omap36xx.dtsi
> --- a/arch/arm/boot/dts/omap36xx.dtsi
> +++ b/arch/arm/boot/dts/omap36xx.dtsi
> @@ -139,6 +139,34 @@
> interrupts = <18>;
> };
> };
> +
> + /*
> + * Note that the sysconfig register layout is a subset of the
> + * "ti,sysc-omap4" type register with just sidle and midle bits
> + * available while omap34xx has "ti,sysc-omap2" type sysconfig.
> + */
> + sgx_module: target-module@50000000 {
> + compatible = "ti,sysc-omap4", "ti,sysc";
> + reg = <0x5000fe00 0x4>,
> + <0x5000fe10 0x4>;
> + reg-names = "rev", "sysc";
> + ti,sysc-midle = <SYSC_IDLE_FORCE>,
> + <SYSC_IDLE_NO>,
> + <SYSC_IDLE_SMART>;
> + ti,sysc-sidle = <SYSC_IDLE_FORCE>,
> + <SYSC_IDLE_NO>,
> + <SYSC_IDLE_SMART>;
> + clocks = <&sgx_fck>, <&sgx_ick>;
> + clock-names = "fck", "ick";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0x50000000 0x2000000>;
> +
> + /*
> + * Closed source PowerVR driver, no child device
> + * binding or driver in mainline
> + */
> + };
> };
>
> thermal_zones: thermal-zones {
> --
> 2.21.0
