On Wed, 2019-08-07 at 17:36 +0100, Lorenzo Pieralisi wrote:
> On Tue, Jul 23, 2019 at 12:27:11PM +0300, Jonathan Chocron wrote:
> > This basically aligns the usage of PCI_PROBE_ONLY and
> > PCI_REASSIGN_ALL_BUS in dw_pcie_host_init() with the logic in
> > pci_host_common_probe().
> >
> > Now it will be possible to control via the devicetree whether to
> > just
> > probe the PCI bus (in cases where FW already configured it) or to
> > fully
> > configure it.
> >
> > Signed-off-by: Jonathan Chocron <jonnyc@xxxxxxxxxx>
> > ---
> > .../pci/controller/dwc/pcie-designware-host.c | 23
> > +++++++++++++++----
> > 1 file changed, 19 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c
> > b/drivers/pci/controller/dwc/pcie-designware-host.c
> > index d2ca748e4c85..0a294d8aa21a 100644
> > --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> > +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> > @@ -342,6 +342,8 @@ int dw_pcie_host_init(struct pcie_port *pp)
> > if (!bridge)
> > return -ENOMEM;
> >
> > + of_pci_check_probe_only();
> > +
> > ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff,
> > &bridge->windows, &pp-
> > >io_base);
> > if (ret)
> > @@ -474,6 +476,10 @@ int dw_pcie_host_init(struct pcie_port *pp)
> >
> > pp->root_bus_nr = pp->busn->start;
> >
> > + /* Do not reassign bus nums if probe only */
> > + if (!pci_has_flag(PCI_PROBE_ONLY))
> > + pci_add_flags(PCI_REASSIGN_ALL_BUS);
>
> This changes the default for bus reassignment on all DWC host (that
> are
> !PCI_PROBE_ONLY), we should drop this line, it can trigger
> regressions.
>
Will be dropped as part of v4. There might also be a behavioral
difference below where I added the if (pci_has_flag(PCI_PROBE_ONLY)).
Is that still ok?
As I pointed out in the cover letter, since PCI_PROBE_ONLY is a system
wide flag, does it make sense to call of_pci_check_probe_only() here,
in the context of a specific driver (including the existing invocation
in pci_host_common_probe()), as opposed to a platform/arch context?
> If we still want to merge it as a separate change we must test it on
> all
> DWC host bridges to make sure it does not trigger any issues with
> current set-ups, that's not going to be easy though.
>
Just out of curiosity, how are such exhaustive tests achieved when a
patch requires them?
> Lorenzo
>
> > +
> > bridge->dev.parent = dev;
> > bridge->sysdata = pp;
> > bridge->busnr = pp->root_bus_nr;
> > @@ -490,11 +496,20 @@ int dw_pcie_host_init(struct pcie_port *pp)
> > if (pp->ops->scan_bus)
> > pp->ops->scan_bus(pp);
> >
> > - pci_bus_size_bridges(pp->root_bus);
> > - pci_bus_assign_resources(pp->root_bus);
> > + /*
> > + * We insert PCI resources into the iomem_resource and
> > + * ioport_resource trees in either pci_bus_claim_resources()
> > + * or pci_bus_assign_resources().
> > + */
> > + if (pci_has_flag(PCI_PROBE_ONLY)) {
> > + pci_bus_claim_resources(pp->root_bus);
> > + } else {
> > + pci_bus_size_bridges(pp->root_bus);
> > + pci_bus_assign_resources(pp->root_bus);
> >
> > - list_for_each_entry(child, &pp->root_bus->children, node)
> > - pcie_bus_configure_settings(child);
> > + list_for_each_entry(child, &pp->root_bus->children,
> > node)
> > + pcie_bus_configure_settings(child);
> > + }
> >
> > pci_bus_add_devices(pp->root_bus);
> > return 0;
> > --
> > 2.17.1
> >
