Hi Guillaume,
On Wed, Jul 31, 2019 at 5:36 PM Guillaume La Roque
<glaroque@xxxxxxxxxxxx> wrote:
>
> Add cpu and ddr temperature sensors for G12 Socs
>
> Signed-off-by: Guillaume La Roque <glaroque@xxxxxxxxxxxx>
with the nit-pick below addressed:
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@xxxxxxxxxxxxxx>
> ---
> .../boot/dts/amlogic/meson-g12-common.dtsi | 22 +++++++++++++++++++
> 1 file changed, 22 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
> index 06e186ca41e3..7f862a3490fb 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
> @@ -1353,6 +1353,28 @@
> };
> };
>
> + cpu_temp: temperature-sensor@34800 {
> + compatible = "amlogic,g12-cpu-thermal",
> + "amlogic,g12-thermal";
> + reg = <0x0 0x34800 0x0 0x50>;
> + interrupts = <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>;
> + clocks = <&clkc CLKID_TS>;
> + status = "okay";
I believe nodes are enabled automatically if they don't have a status property
> + #thermal-sensor-cells = <0>;
> + amlogic,ao-secure = <&sec_AO>;
> + };
> +
> + ddr_temp: temperature-sensor@34c00 {
> + compatible = "amlogic,g12-ddr-thermal",
> + "amlogic,g12-thermal";
> + reg = <0x0 0x34c00 0x0 0x50>;
> + interrupts = <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>;
> + clocks = <&clkc CLKID_TS>;
> + status = "okay";
same here
Martin
