On Wed, Jul 24, 2019 at 02:19:35PM -0700, Doug Anderson wrote:
> Hi,
>
> On Thu, Jul 11, 2019 at 3:35 PM Matthias Kaehlcke <mka@xxxxxxxxxxxx> wrote:
> >
> > diff --git a/arch/arm/boot/dts/rk3288-veyron-edp.dtsi b/arch/arm/boot/dts/rk3288-veyron-edp.dtsi
> > new file mode 100644
> > index 000000000000..5d812e9e78aa
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/rk3288-veyron-edp.dtsi
> > @@ -0,0 +1,124 @@
> > +// SPDX-License-Identifier: GPL-2.0
>
> Please allow MIT license:
>
> // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
ok
> > +&pinctrl {
> > + backlight {
> > + bl_en: bl-en {
> > + rockchip,pins = <7 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
> > + };
> > + };
> > +};
>
> nit: convention on Rockchip device tree files is that all pinctrl
> stuff is at the bottom. Downstream I think I added comments about
> this but those didn't make it upstream.
I'll move it to the bottom
> Also: why did you move "bl_en" here but not "edp_hpd"?
'bl_en' is defined in rk3288-veyron-chromebook.dtsi, 'edp_hdp' in
rk3288.dtsi of the SoC.
