Even though the binding claims that the frequency can go up to 6MHz, the common i2c binding sets a limit at 3MHz, which then triggers a warning. Since the only SoC that uses that bus uses a frequency of 100kHz, and that this bus hasn't been found in an SoC for something like 5 years, let's just fix the example to have a frequency within the acceptable range for i2c. Signed-off-by: Maxime Ripard <maxime.ripard@xxxxxxxxxxx> --- .../devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml b/Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml index 1804abe24f14..f9d526b7da01 100644 --- a/Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml +++ b/Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml @@ -51,7 +51,7 @@ examples: reg = <0x01f03400 0x400>; interrupts = <0 39 4>; clocks = <&apb0_gates 3>; - clock-frequency = <6000000>; + clock-frequency = <100000>; resets = <&apb0_rst 3>; #address-cells = <1>; #size-cells = <0>; -- 2.21.0