Hi Miquel,
> > Document the bindings used by the Macronix raw NAND controller.
> >
> > Signed-off-by: Mason Yang <masonccyang@xxxxxxxxxxx>
> > ---
> > .../devicetree/bindings/mtd/mxic-nand.txt | 26
++++++++++++++++++++++
> > 1 file changed, 26 insertions(+)
> > create mode 100644
Documentation/devicetree/bindings/mtd/mxic-nand.txt
> >
> > diff --git a/Documentation/devicetree/bindings/mtd/mxic-nand.txt b/
> Documentation/devicetree/bindings/mtd/mxic-nand.txt
> > new file mode 100644
> > index 0000000..3d198e4
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/mtd/mxic-nand.txt
> > @@ -0,0 +1,26 @@
> > +Macronix Raw NAND Controller Device Tree Bindings
> > +-------------------------------------------------
> > +
> > +Required properties:
> > +- compatible: should be "mxic,raw-nand-ctlr"
>
> I would prefer "macronix,nand-controller"
okay, will patch it.
>
> > +- reg: should contain 1 entrie for the registers
>
> entry
>
> > +- reg-names: should contain "regs"
>
> Not sure you need that?
for a base address of ctlr registers.
>
> > +- interrupts: interrupt line connected to this NAND controller
> > +- clock-names: should contain "ps_clk", "send_clk" and "send_dly_clk"
> > +- clocks: should contain 3 entries for the "ps_clk", "send_clk" and
> > + "send_dly_clk" clocks
>
> s/entries/phandles/ ?
?
as I know that kernel views the phandle values as device tree structure
information instead of device tree data and thus does not store them as
properties.
>
> > +
> > +Example:
> > +
> > + nand: mxic-nfc@43c30000 {
> > + compatible = "mxic,raw-nand-ctlr";
> > + reg = <0x43c30000 0x10000>;
> > + reg-names = "regs";
> > + clocks = <&clkwizard 0>, <&clkwizard 1>, <&clkc 15>;
> > + clock-names = "send_clk", "send_dly_clk", "ps_clk";
> > +
> > + nand-ecc-mode = "soft";
> > + nand-ecc-algo = "bch";
> > + nand-ecc-step-size = <512>;
> > + nand-ecc-strength = <8>;
>
> The last 4 lines are probably not needed.
okay, will remove them.
thanks for your review.
best regards,
Mason
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