On Thu, Jun 13, 2019 at 6:23 AM Will Deacon <will.deacon@xxxxxxx> wrote: > > On Wed, May 01, 2019 at 06:43:29PM +0000, Frank Li wrote: > > Add ddr performance monitor support for iMX8QXP > > > > There are 4 counters for ddr perfomance events. > > counter 0 is dedicated for cycles. > > you choose any up to 3 no cycles events. > > > > for example: > > > > perf stat -a -e imx8_ddr0/read-cycles/,imx8_ddr0/write-cycles/,imx8_ddr0/precharge/ ls > > perf stat -a -e imx8_ddr0/cycles/,imx8_ddr0/read-access/,imx8_ddr0/write-access/ ls > > I've pushed patches 1, 2 and 4 out with some minor tweaks to: > > https://git.kernel.org/pub/scm/linux/kernel/git/will/linux.git/log/?h=for-next/perf > > I'll leave the actual .dts change to go via the soc tree, since last time > I took one of those it just resulted in conflicts. > > Frank, Andrey: Please could you try to run the perf fuzzer on this before > it lands in mainline? It has a good track record of finding nasty PMU driver > bugs, but it obviously requires access to hardware which implements the PMU: > > http://web.eece.maine.edu/~vweaver/projects/perf_events/fuzzer/ Okay, how long should be run generally? I need make sure it can pass without my patches at our platform. Best regards Frank Li > > Cheers, > > Will
