On Tue, 11 Jun 2019 18:29:35 +0100, Dragan Cvetic wrote: > Add the Soft Decision Forward Error Correction (SDFEC) Engine > bindings which is available for the Zynq UltraScale+ RFSoC > FPGA's. > > Signed-off-by: Dragan Cvetic <dragan.cvetic@xxxxxxxxxx> > Signed-off-by: Derek Kiernan <derek.kiernan@xxxxxxxxxx> > --- > .../devicetree/bindings/misc/xlnx,sd-fec.txt | 58 ++++++++++++++++++++++ > 1 file changed, 58 insertions(+) > create mode 100644 Documentation/devicetree/bindings/misc/xlnx,sd-fec.txt > Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
