On 2019-06-10 at 12:55 +0000, Vinod Koul wrote: > On 10-06-19, 16:17, yibin.gong@xxxxxxx wrote: > > > > From: Robin Gong <yibin.gong@xxxxxxx> > > > > For the compatibility of NXP internal legacy kernel before 4.19 > > which > > is based on uart ram script and upstreaming kernel based on uart > > rom > > script, add both uart ram/rom script in latest sdma firmware. By > > default > > uart rom script used. > > Besides, add two multi-fifo scripts for SAI/PDM on i.mx8m/8mm and > > add > > back qspi script miss for v4(i.mx7d/8m/8mm family, but v3 is for > > i.mx6). > > > > rom script: > > uart_2_mcu_addr > > uartsh_2_mcu_addr /* through spba bus */ > > ram script: > > uart_2_mcu_ram_addr > > uartsh_2_mcu_ram_addr /* through spba bus */ > > > > Please get latest sdma firmware from the below and put them into > > the path > > (/lib/firmware/imx/sdma/): > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fg > > it.kernel.org%2Fpub%2Fscm%2Flinux%2Fkernel%2Fgit%2Ffirmware%2Flinux > > -firmware.git&data=02%7C01%7Cyibin.gong%40nxp.com%7C6a7833e8a09 > > 344d9951e08d6eda35fc5%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C > > 636957683278190279&sdata=RHeypEOREiPGmKveg6gYPy%2FMg8Dzz4JpcHsm > > %2Bbdxlzo%3D&reserved=0 > > /tree/imx/sdma > How does this work with folks have older firmware? The older SDMA RAM script(firmware) will break the uart driver of upstreaming kernel for these years, this is why Lucas raise uart driver patch (commit 905c0decad28) to use ROM script instead. There are two ways to fix uart issue: one is checking 'Idle Condition Detection'/'Aging timer' in RAM script and enable 'IDLE' in uart driver, another is only checking 'Aging timer' in ROM script and adjusting RX FIFO burst length one word less to ensure at least one word left forever in RX FIFO which is the trigger requirement of 'Aging timer'(So no need 'IDLE', 'Aging time' is enough) . FSL/NXP internal kernel go with the first option, while upstreaming kernel go with the second. Since Lucas's patch assume ROM script used in kernel and disable 'IDLE', upstreaming kernel broken in uart driver with older firmware for these years. So this patch is just for fix this compatibility issue with the ram script(older firmware) updated in linux-firmware(done already.), thus both RAM script and ROM script can work in kernel. Besides, kernel with the latest RAM firmware and this patch set can workaround ecspi issue without any function break which Lucas concerned about. > > > > > > > Signed-off-by: Robin Gong <yibin.gong@xxxxxxx> > > --- > > drivers/dma/imx-sdma.c | 4 ++-- > > include/linux/platform_data/dma-imx-sdma.h | 10 ++++++++-- > > 2 files changed, 10 insertions(+), 4 deletions(-) > > > > diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c > > index f7c150d..deea9aa 100644 > > --- a/drivers/dma/imx-sdma.c > > +++ b/drivers/dma/imx-sdma.c > > @@ -1733,8 +1733,8 @@ static void sdma_issue_pending(struct > > dma_chan *chan) > > > > #define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V1 34 > > #define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V2 38 > > -#define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V3 41 > > -#define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V4 42 > > +#define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V3 45 > > +#define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V4 46 > > > > static void sdma_add_scripts(struct sdma_engine *sdma, > > const struct sdma_script_start_addrs *addr) > > diff --git a/include/linux/platform_data/dma-imx-sdma.h > > b/include/linux/platform_data/dma-imx-sdma.h > > index f794fee..e12d2e8 100644 > > --- a/include/linux/platform_data/dma-imx-sdma.h > > +++ b/include/linux/platform_data/dma-imx-sdma.h > > @@ -20,12 +20,12 @@ struct sdma_script_start_addrs { > > s32 per_2_firi_addr; > > s32 mcu_2_firi_addr; > > s32 uart_2_per_addr; > > - s32 uart_2_mcu_addr; > > + s32 uart_2_mcu_ram_addr; > > s32 per_2_app_addr; > > s32 mcu_2_app_addr; > > s32 per_2_per_addr; > > s32 uartsh_2_per_addr; > > - s32 uartsh_2_mcu_addr; > > + s32 uartsh_2_mcu_ram_addr; > > s32 per_2_shp_addr; > > s32 mcu_2_shp_addr; > > s32 ata_2_mcu_addr; > > @@ -52,7 +52,13 @@ struct sdma_script_start_addrs { > > s32 zcanfd_2_mcu_addr; > > s32 zqspi_2_mcu_addr; > > s32 mcu_2_ecspi_addr; > > + s32 mcu_2_sai_addr; > > + s32 sai_2_mcu_addr; > > + s32 uart_2_mcu_addr; > > + s32 uartsh_2_mcu_addr; > > /* End of v3 array */ > > + s32 mcu_2_zqspi_addr; > > + /* End of v4 array */ > > }; > > > > /** > > -- > > 2.7.4
