On Tue, Apr 23, 2019 at 12:50:46PM +0200, Simon Horman wrote: > On Tue, Apr 23, 2019 at 07:09:58PM +0900, Nguyen An Hoan wrote: > > From: Hoan Nguyen An <na-hoan@xxxxxxxxxxx> > > > > Add r8a77965 DRIF bindings. > > > > Signed-off-by: Hoan Nguyen An <na-hoan@xxxxxxxxxxx> > > According to the User's Manual Hardware, v1.50 Nov 20 2019, > the DRIF IP block M3-N (r8a77965) has a BITCTR register which > is not present on the H3 (r8a7795) or M3-W (r8a77995). > > Does the DRIF IP block present on the M3-N (r8a77965) function > without support for this register in the driver? > > If not then I think that: > 1) This patch should be updated to note that renesas,rcar-gen3-drif > can only be used with H3 (r8a7795) and M3-W (r8a77995). > 2) A driver patch is required > 3) The DT patch, 2/2 of this series, should be updated to > i) Not use renesas,rcar-gen3-drif > ii) Extend the register aperture from 0x64 to 0x84. Hi, I'm wondering what the status of this patchset it. > > > --- > > Documentation/devicetree/bindings/media/renesas,drif.txt | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/Documentation/devicetree/bindings/media/renesas,drif.txt b/Documentation/devicetree/bindings/media/renesas,drif.txt > > index 0d8974a..16cdee3 100644 > > --- a/Documentation/devicetree/bindings/media/renesas,drif.txt > > +++ b/Documentation/devicetree/bindings/media/renesas,drif.txt > > @@ -41,6 +41,7 @@ Required properties of an internal channel: > > ------------------------------------------- > > - compatible: "renesas,r8a7795-drif" if DRIF controller is a part of R8A7795 SoC. > > "renesas,r8a7796-drif" if DRIF controller is a part of R8A7796 SoC. > > + "renesas,r8a77965-drif" if DRIF controller is a part of R8A77965 SoC. > > "renesas,rcar-gen3-drif" for a generic R-Car Gen3 compatible device. > > > > When compatible with the generic version, nodes must list the > > -- > > 2.7.4 > > >
