Allwinner H6 has a different mapping for the fifo register controller.
Actually only the fifo TX bit is used in the drivers.
Use the freshly introduced quirks to make this drivers compatible with
the Allwinner H6.
Signed-off-by: Clément Péron <peron.clem@xxxxxxxxx>
---
sound/soc/sunxi/sun4i-spdif.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/sound/soc/sunxi/sun4i-spdif.c b/sound/soc/sunxi/sun4i-spdif.c
index 045d0cc4b62a..54c09346d298 100644
--- a/sound/soc/sunxi/sun4i-spdif.c
+++ b/sound/soc/sunxi/sun4i-spdif.c
@@ -75,6 +75,18 @@
#define SUN4I_SPDIF_FCTL_RXOM(v) ((v) << 0)
#define SUN4I_SPDIF_FCTL_RXOM_MASK GENMASK(1, 0)
+#define SUN50I_H6_SPDIF_FCTL (0x14)
+ #define SUN50I_H6_SPDIF_FCTL_HUB_EN BIT(31)
+ #define SUN50I_H6_SPDIF_FCTL_FTX BIT(30)
+ #define SUN50I_H6_SPDIF_FCTL_FRX BIT(29)
+ #define SUN50I_H6_SPDIF_FCTL_TXTL(v) ((v) << 12)
+ #define SUN50I_H6_SPDIF_FCTL_TXTL_MASK GENMASK(19, 12)
+ #define SUN50I_H6_SPDIF_FCTL_RXTL(v) ((v) << 4)
+ #define SUN50I_H6_SPDIF_FCTL_RXTL_MASK GENMASK(10, 4)
+ #define SUN50I_H6_SPDIF_FCTL_TXIM BIT(2)
+ #define SUN50I_H6_SPDIF_FCTL_RXOM(v) ((v) << 0)
+ #define SUN50I_H6_SPDIF_FCTL_RXOM_MASK GENMASK(1, 0)
+
#define SUN4I_SPDIF_FSTA (0x18)
#define SUN4I_SPDIF_FSTA_TXE BIT(14)
#define SUN4I_SPDIF_FSTA_TXECNTSHT (8)
@@ -438,6 +450,12 @@ static const struct sun4i_spdif_quirks sun8i_h3_spdif_quirks = {
.has_reset = true,
};
+static const struct sun4i_spdif_quirks sun50i_h6_spdif_quirks = {
+ .reg_dac_txdata = SUN8I_SPDIF_TXFIFO,
+ .val_fctl_ftx = SUN50I_H6_SPDIF_FCTL_FTX,
+ .has_reset = true,
+};
+
static const struct of_device_id sun4i_spdif_of_match[] = {
{
.compatible = "allwinner,sun4i-a10-spdif",
@@ -451,6 +469,10 @@ static const struct of_device_id sun4i_spdif_of_match[] = {
.compatible = "allwinner,sun8i-h3-spdif",
.data = &sun8i_h3_spdif_quirks,
},
+ {
+ .compatible = "allwinner,sun50i-h6-spdif",
+ .data = &sun50i_h6_spdif_quirks,
+ },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, sun4i_spdif_of_match);
--
2.20.1
