Hi Robin, Am Mittwoch, den 22.05.2019, 09:59 +0000 schrieb Robin Gong: > There is ecspi ERR009165 on i.mx6/7 soc family, which cause FIFO > transfer to be send twice in DMA mode. Please get more information from: > https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf. The workaround is adding > new sdma ram script which works in XCH mode as PIO inside sdma instead > of SMC mode, meanwhile, 'TX_THRESHOLD' should be 0. The issue should be > exist on all legacy i.mx6/7 soc family before i.mx6ul. > NXP fix this design issue from i.mx6ul, so newer chips including i.mx6ul/ > 6ull/6sll do not need this workaroud anymore. All other i.mx6/7/8 chips > still need this workaroud. This patch set add new 'fsl,imx6ul-ecspi' > for ecspi driver and 'ecspi_fixed' in sdma driver to choose if need errata > or not. > The first two reverted patches should be the same issue, though, it > seems 'fixed' by changing to other shp script. Hope Sean or Sascha could > have the chance to test this patch set if could fix their issues. > Besides, enable sdma support for i.mx8mm/8mq and fix ecspi1 not work > on i.mx8mm because the event id is zero. > > PS: > Please get sdma firmware from below linux-firmware and copy it to your > local rootfs /lib/firmware/imx/sdma. > https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/tree/imx/sdma I haven't tested this so asking the obvious question: what happens when this series is applied without the RAM script being present on the system? Will it render SPI unusable? I guess so since it changes the flow between the SPI core and DMA controller. Can we somehow detect that SDMA isn't using the correct RAM script and fall back to PIO mode in the SPI driver in that case? Currently using the RAM script is not an option in a lot of use-cases, as it still breaks serial DMA support. The fix for the serial issue really needs to be remove the broken serial script from the RAM firmware, not change the serial driver to deal with the broken behavior introduced by the RAM script. Regards, Lucas
