Hi Doug,
thanks for the review!
On Wed, May 15, 2019 at 11:30:24AM -0700, Doug Anderson wrote:
> Hi,
>
> On Wed, May 15, 2019 at 8:31 AM Matthias Kaehlcke <mka@xxxxxxxxxxxx> wrote:
>
> > This value matches what is used by the downstream Chrome OS 3.14
> > kernel, the 'official' kernel for veyron devices.
> >
> > Signed-off-by: Matthias Kaehlcke <mka@xxxxxxxxxxxx>
> > ---
> > arch/arm/boot/dts/rk3288-veyron.dtsi | 8 ++++++++
> > 1 file changed, 8 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
> > index 1252522392c7..169da06e1c09 100644
> > --- a/arch/arm/boot/dts/rk3288-veyron.dtsi
> > +++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
> > @@ -446,6 +446,14 @@
> > status = "okay";
> > };
> >
> > +&gpu_thermal {
> > + trips {
> > + gpu_alert0: gpu_alert0 {
> > + temperature = <72500>; /* millicelsius */
> > + };
> > + };
> > +};
> > +
>
> This should be sorted alphabetically. Thus this should sort right
> after this in rk3288-veyron.dtsi
>
> &gpu {
> mali-supply = <&vdd_gpu>;
> status = "okay";
> };
will do in the next revision.
> Also you don't need to replicate the whole structure? I think the
> above should just be:
>
> &gpu_alert0 {
> temperature = <72500>; /* millicelsius */
> };
ack
> NOTE also that that gpu and cpu critical is 100 C downstream. Should
> we do that too?
I missed this delta, yes let's do this too in this series.
> Ah, but before we do that I guess we'd need to also override the
> "rockchip,hw-tshut-temp" to 125000 to match downstream. I guess that
> could be a separate series?
Yes, the value should at least be higher than the critical trip point,
matching downstream seems to make sense.
