Hi Miquel,
> > +Macronix MX25F0A MultiFunction Device Tree Bindings
> > +----------------------------------------------------
> > +
> > +MX25F0A is a MultiFunction Device with SPI and raw NAND, which
> > +supports either spi host controller or raw nand controller.
>
> Acronyms in plain English should be in upper case.
okay, will fix.
> > +Example:
> > +
> > + mxic: mx25f0a@43c30000 {
> > + compatible = "mxic,mx25f0a";
> > + reg = <0x43c30000 0x10000>, <0xa0000000 0x4000000>;
> > + reg-names = "regs", "dirmap";
> > +
> > + /* spi */
> > + clocks = <&clkwizard 0>, <&clkwizard 1>, <&clkc 15>;
> > + clock-names = "send_clk", "send_dly_clk", "ps_clk";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + flash@0 {
> > + compatible = "jedec,spi-nor";
> > + reg = <0>;
> > + spi-max-frequency = <25000000>;
> > + spi-tx-bus-width = <4>;
> > + spi-rx-bus-width = <4>;
> > + };
> > +
> > + /* nand */
> > + nand-ecc-mode = "soft";
> > + nand-ecc-algo = "bch";
> > + nand-ecc-step-size = <512>;
> > + nand-ecc-strength = <8>;
>
> Any reason to enforce 512B/8b correction? Why not letting the core
> choose for you depending on the NAND chip's requirements?
>
I thought here is just a raw NAND DTS example.
Will remove it.
>
> Anyway, I think you can have only one or the other (NAND or SPI), not
> both, and you probably should have a compatible or a property to tell
> the kernel which one you are using, right?
>
yes, you are right.
New DTS is bellow.
-------------------------------------------------------------------------->
Macronix Flash Memory Controller Device Tree Bindings
-----------------------------------------------------
Macronix Flash Memory Controller supports serial and raw Flash, including
NOR and NAND Flash for high throughput and low pin count applications.
It's a MultiFunction Device which supports either SPI host controller or
raw NAND controller.
Required properties:
- compatible: should be "mxic,mfd"
- reg: should contain 2 entries, one for the registers and one for the
direct
mapping area in SPI mode.
- reg-names: should contain "regs" and "dirmap"
- interrupts: interrupt line connected to this controller
- SPI:
- #address-cells: should be 1
- #size-cells: should be 0
- clock-names: should contain "ps_clk", "send_clk" and
"send_dly_clk"
- clocks: should contain 3 entries for the "ps_clk", "send_clk"
and "send_dly_clk" clocks
- Raw NAND:
- nand-ecc-mode = "soft";
- nand-ecc-algo = "bch";
Example:
- SPI mode:
mxic: mxic-mfd@43c30000 {
compatible = "mxic,mfd";
reg = <0x43c30000 0x10000>, <0xa0000000 0x4000000>;
reg-names = "regs", "dirmap";
clocks = <&clkwizard 0>, <&clkwizard 1>, <&clkc 15>;
clock-names = "send_clk", "send_dly_clk", "ps_clk";
#address-cells = <1>;
#size-cells = <0>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
};
};
- Raw NAND mode:
mxic: mxic-mfd@43c30000 {
compatible = "mxic,mfd";
reg = <0x43c30000 0x10000>, <0xa0000000 0x4000000>;
reg-names = "regs", "dirmap";
nand-ecc-mode = "soft";
nand-ecc-algo = "bch";
};
---------------------------------------------------------------------<
thanks for your review.
best regards,
Mason
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