On Fri, May 10, 2019 at 10:23 AM Guillaume La Roque <glaroque@xxxxxxxxxxxx> wrote: > > add drive-strength bank regiter and bit value for G12A SoC > > Signed-off-by: Guillaume La Roque <glaroque@xxxxxxxxxxxx> Reviewed-by: Martin Blumenstingl<martin.blumenstingl@xxxxxxxxxxxxxx>