Add support according the SMARC Spec 1.1 [1] and provided schematics. Kontron connected the pin to the SoM CPLD too. The CPLD performs after a 30s timeout so we need to enable the watchdog per default. [1] https://sget.org/standards/smarc Signed-off-by: Marco Felsch <m.felsch@xxxxxxxxxxxxxx> --- arch/arm/boot/dts/imx6qdl-kontron-samx6i.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/imx6qdl-kontron-samx6i.dtsi b/arch/arm/boot/dts/imx6qdl-kontron-samx6i.dtsi index 1b2764a9ba7f..e62f349a351a 100644 --- a/arch/arm/boot/dts/imx6qdl-kontron-samx6i.dtsi +++ b/arch/arm/boot/dts/imx6qdl-kontron-samx6i.dtsi @@ -691,6 +691,12 @@ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 >; }; + + pinctrl_wdog1: wdog1rp { + fsl,pins = < + MX6QDL_PAD_GPIO_9__WDOG1_B 0x1b0b0 + >; + }; }; &mipi_csi { @@ -770,3 +776,10 @@ no-1-8-v; non-removable; }; + +&wdog1 { + /* CPLD is feeded by watchdog (hardwired) */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdog1>; + status = "okay"; +}; -- 2.20.1
