Added binding doc for imx8qxp ddr performance monitor
Signed-off-by: Frank Li <Frank.Li@xxxxxxx>
Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
---
Change from v8 to v9
* use 32bit address width
No change from v4 to v8
Change from v4 to v4
* remove "standard xxx"
Change from v2 to v3
* ddr_pmu0 -> ddr-pmu
.../devicetree/bindings/perf/fsl-imx-ddr.txt | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
create mode 100644 Documentation/devicetree/bindings/perf/fsl-imx-ddr.txt
diff --git a/Documentation/devicetree/bindings/perf/fsl-imx-ddr.txt b/Documentation/devicetree/bindings/perf/fsl-imx-ddr.txt
new file mode 100644
index 0000000..9b9cda6a
--- /dev/null
+++ b/Documentation/devicetree/bindings/perf/fsl-imx-ddr.txt
@@ -0,0 +1,22 @@
+* Freescale(NXP) IMX8 DDR performance monitor
+
+Required properties:
+
+- compatible: should be one of:
+ "fsl,imx8-ddr-pmu"
+ "fsl,imx8m-ddr-pmu"
+
+- reg: physical address and size
+
+- interrupts: single interrupt
+ generated by the control block
+
+Example:
+
+ ddr-pmu@5c020000 {
+ compatible = "fsl,imx8-ddr-pmu";
+ reg = <0x5c020000 0x10000>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
--
2.5.2
