Hi Greg, > -----Original Message----- > From: Greg KH [mailto:gregkh@xxxxxxxxxxxxxxxxxxx] > Sent: Thursday 25 April 2019 21:24 > To: Dragan Cvetic <draganc@xxxxxxxxxx> > Cc: arnd@xxxxxxxx; Michal Simek <michals@xxxxxxxxxx>; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; Derek > Kiernan <dkiernan@xxxxxxxxxx> > Subject: Re: [PATCH V2 01/12] dt-bindings: xilinx-sdfec: Add SDFEC binding > > On Tue, Apr 09, 2019 at 11:06:43AM +0100, Dragan Cvetic wrote: > > Add the Soft Decision Forward Error Correction (SDFEC) Engine > > bindings which is available for the Zynq UltraScale+ RFSoC > > FPGA's. > > > > Signed-off-by: Dragan Cvetic <dragan.cvetic@xxxxxxxxxx> > > Signed-off-by: Derek Kiernan <derek.kiernan@xxxxxxxxxx> > > --- > > .../devicetree/bindings/misc/xlnx,sd-fec.txt | 58 ++++++++++++++++++++++ > > 1 file changed, 58 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/misc/xlnx,sd-fec.txt > > Don't you have to send new bindings to the DT maintainers? They will be in the email list from now on. Thanks Dragan > > thanks, > > greg k-h
