Re: [PATCH 2/2] clk: qoriq: add more PLL divider clocks support

[Stephen Boyd <sboyd@xxxxxxxxxx>]

Quoting andy.tang@xxxxxxx (2019-04-22 02:15:09)
> From: Yuantian Tang <andy.tang@xxxxxxx>
> 
> More PLL divider clocks are needed by clock consumer IP. So enlarge
> the PLL divider array to accommodate more divider clocks.
> 
> Signed-off-by: Yuantian Tang <andy.tang@xxxxxxx>
> ---

Applied to clk-next