NXP LPC3220 and LPC3230 SoCs do NOT contain a MAC controller, so,
since for now there is just one dtsi file for all variants of
NXP LPC32xx SoCs, it is reasonable to disable the controller
by default and enable it in device tree files of particular boards.
Signed-off-by: Vladimir Zapolskiy <vz@xxxxxxxxx>
---
arch/arm/boot/dts/lpc3250-ea3250.dts | 1 +
arch/arm/boot/dts/lpc3250-phy3250.dts | 1 +
arch/arm/boot/dts/lpc32xx.dtsi | 1 +
3 files changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/lpc3250-ea3250.dts b/arch/arm/boot/dts/lpc3250-ea3250.dts
index f46a11827ef6..4adf4c96f798 100644
--- a/arch/arm/boot/dts/lpc3250-ea3250.dts
+++ b/arch/arm/boot/dts/lpc3250-ea3250.dts
@@ -201,6 +201,7 @@
&mac {
phy-mode = "rmii";
use-iram;
+ status = "okay";
};
/* Here, choose exactly one from: ohci, usbd */
diff --git a/arch/arm/boot/dts/lpc3250-phy3250.dts b/arch/arm/boot/dts/lpc3250-phy3250.dts
index ebd19258e22b..b99726d278f6 100644
--- a/arch/arm/boot/dts/lpc3250-phy3250.dts
+++ b/arch/arm/boot/dts/lpc3250-phy3250.dts
@@ -134,6 +134,7 @@
&mac {
phy-mode = "rmii";
use-iram;
+ status = "okay";
};
/* Here, choose exactly one from: ohci, usbd */
diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi
index aa1d9dd248fd..a0fedab579b4 100644
--- a/arch/arm/boot/dts/lpc32xx.dtsi
+++ b/arch/arm/boot/dts/lpc32xx.dtsi
@@ -153,6 +153,7 @@
reg = <0x31060000 0x1000>;
interrupts = <29 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk LPC32XX_CLK_MAC>;
+ status = "disabled";
};
emc: memory-controller@31080000 {
--
2.20.1
