MT8183 is a SoC based on 64bit ARMv8 architecture. It contains 4 CA53 and 4 CA73 cores. MT8183 share many HW IP with MT65xx series. This patchset was tested on MT8183 evaluation board and use correct clock to shell. Based on v5.1-rc1 and http://lists.infradead.org/pipermail/linux-mediatek/2019-March/017963.html Change in v10: Add the L2 cache node to prevent warning on unable to detect cache hierarchy. Change in v9: Remove pio node since binding is not documented yet Change in v8: 1. Fix interrupt-parent of pio node 2. Remove pinfunc.h and spi node patches Change in v7: 1. Place all the MMIO peripherals under one or more simple-bus nodes 2. Make the pinfunc.h and spi node into seperate patch 3. Modify SPIs pamerater from 4 back to 3 and remove patch "support 4 interrupt parameters for sysirq" 4. Rename intpol-controller to interrupt-controller 5. Rename pinctrl@1000b000 to pinctrl@10005000 Change in v6: 1. Remove power and iommu nodes 2. Fix dtb build warning 3. Fix pinctrl binding doc 4. Fix '_' in node names Change in v5: 1. Collect all device tree nodes to the last patch 2. Add PMU 3. Add Signed-off-by 4. Remove clock driver code and binding doc 5. Add pinctrl, iommu, spi, and pwrap nodes Change in v4: 1. Correct syntax error in dtsi 2. Add MT8183 clock support Change in v3: 1. Fill out GICC, GICH, GICV regions 2. Update Copyright to 2018 Change in v2: 1. Split dt-bindings into different patches 2. Correct bindings for supported SoCs (mtk-uart.txt) Ben Ho (1): arm64: dts: Add Mediatek SoC MT8183 and evaluation board dts and Makefile arch/arm64/boot/dts/mediatek/Makefile | 1 + arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 31 +++ arch/arm64/boot/dts/mediatek/mt8183.dtsi | 329 ++++++++++++++++++++++++++++ 3 files changed, 361 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-evb.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8183.dtsi -- 1.9.1
