Re: [PATCH 08/30] PCI: tegra: Disable AFI dynamic clock gating

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On Thu, Apr 11, 2019 at 10:33:33PM +0530, Manikanta Maddireddy wrote:
> Outstanding write counter in AFI is used to generate idle signal to
> dynamically gate the AFI clock. When there are 32 outstanding writes
> from AFI to memory, the outstanding write counter overflows and
> indicates that there are "0" outstanding write transactions.
> 
> When memory controller is under heavy load, write completions to AFI
> gets delayed and AFI write counter overflows. This causes AFI clock gating
> even when there are outstanding transactions towards memory controller
> resutling in system hang.

s/resutling/resulting/

With that fixed:

Acked-by: Thierry Reding <treding@xxxxxxxxxx>

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