On Mon, Apr 01, 2019 at 10:56:40AM +0200, Maxime Ripard wrote: > Hi, > > We've had for quite some time to hack around in our drivers to take into > account the fact that our DMA accesses are not done through the parent > node, but through another bus with a different mapping than the CPU for the > RAM (0 instead of 0x40000000 for most SoCs). > > After some discussion after the submission of a camera device suffering of > the same hacks, I've decided to put together a serie that introduce a > special interconnect name called "dma" that that allows to express the DMA > relationship between a master and its bus, even if they are not direct > parents in the DT. > > Let me know what you think, > Maxime LGTM. How do you propose merging this? I can take 1-5, and 6 and 7 thru arm-soc? Rob
