On Thu, Apr 04, 2019 at 06:21:11PM +0200, Miquel Raynal wrote: > In the current state, sun8i NAND controllers use PIO during > transfers. Throughput can be increased thanks to the use of DMA > (mostly during reads, because of the ECC pipelining feature). > > Besides the usual addition of DMA DT properties, because the sun8i The only thing that "sun8i" means for Allwinner is that the SoC has Cortex-A7 CPUs. You need to be more precise than that, why not just use A33? Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
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