+ compatible = "video-mux";
+ mux-controls = <&mux 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+
+
csi_mux_from_mipi_vc0: endpoint {
+
remote-endpoint = <&mipi_vc0_to_csi_mux>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ csi_mux_to_csi:
endpoint {
+
remote-endpoint = <&csi_from_csi_mux>;
+ };
+ };
+ };
};
ocotp: ocotp-ctrl@30350000 {
@@ -709,6 +738,23 @@
status = "disabled";
};
+ csi: csi@30710000 {
+ compatible = "fsl,imx7-csi";
+ reg = <0x30710000 0x10000>;
+ interrupts = <GIC_SPI 7
IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX7D_CLK_DUMMY>,
+ <&clks
IMX7D_CSI_MCLK_ROOT_CLK>,
+ <&clks IMX7D_CLK_DUMMY>;
+ clock-names = "axi", "mclk",
"dcic";
+ status = "disabled";
+
+ port {
+ csi_from_csi_mux: endpoint
{
+ remote-endpoint =
<&csi_mux_to_csi>;
+ };
+ };
+ };
+
lcdif: lcdif@30730000 {
compatible = "fsl,imx7d-lcdif",
"fsl,imx28-lcdif";
reg = <0x30730000 0x10000>;
@@ -718,6 +764,35 @@
clock-names = "pix", "axi";
status = "disabled";
};
+
+ mipi_csi: mipi-csi@30750000 {
+ compatible = "fsl,imx7-mipi-csi2";
+ reg = <0x30750000 0x10000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <GIC_SPI 25
IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks
IMX7D_IPG_ROOT_CLK>,
+ <&clks
IMX7D_MIPI_CSI_ROOT_CLK>,
+ <&clks
IMX7D_MIPI_DPHY_ROOT_CLK>;
+ clock-names = "pclk", "wrap",
"phy";
+ power-domains = <&pgc_mipi_phy>;
+ phy-supply = <®_1p0d>;
+ resets = <&src
IMX7_RESET_MIPI_PHY_MRST>;
+ reset-names = "mrst";
+ status = "disabled";
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@1 {
+ reg = <1>;
+
+ mipi_vc0_to_csi_mux:
endpoint {
+ remote-endpoint =
<&csi_mux_from_mipi_vc0>;
+ };
+ };
+ };
};
aips3: aips-bus@30800000 {