> On Tue, Mar 26, 2019 at 10:56:40PM -0700, Sowjanya Komatineni wrote: > > This patch adds below cs timing properties to allow SPI master > > configuring setup, hold and time interval between two SPI transactions > > to meet specific SPI client device requirements. > > CS setup time > > CS hold time > > CS inactive delay > > DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; > > t=1553666253; bh=TbJVgRAIkjok3TkKNkfcvYc4WGyZhOpiH6sUZvadGrQ=; > > h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: > > In-Reply-To:References:X-NVConfidentiality:MIME-Version: > > Content-Type; > > b=Tud9guY5XCzkjKA2k2n0+xO/vTfMTNhH1e0viAyYmlgoG/j+uSBAAmOeZucVUlmEa > > rwqxlSm+rkYMUfgSWqmJXqEjgRIAqMhA32FOJmhgpblGwYUR22hnbdhbk4TcqMNsIO > > Something got corrupted? Possible. Will re-send anyway with your feedback fixes. > > +spi-client device controller properties: > > +- nvidia,cs-setup-clk-count: CS setup timing parameter. > > +- nvidia,cs-hold-clk-count: CS hold timing parameter. > > +- nvidia,cs-inactive-cycles: CS inactive delay in terms of clock > > +between > > + transfers. > > Why are these being done as nVidia specific properties rather than generic ones and why are these being configured in DT rather than by the client driver? If the devices have particular timing requirements for chip select presumably that's going to apply no matter what controller or system they're used with so it seems best to configure this in the client driver and have an API that any controller can implement. These are implemented thru DT as Tegra SPI is master and master controls the timing. Some SPI slaves have specific requirements of certain CS setup/hold time and inactive cycles which SPI master should meet when driving during transfer and Tegra SPI controller supports tuning these parameters.
